I am working with a custom board, and are using the CM4 core to configure and mange FPGAs via the FMC.  In my system the FPGA configuration requires the transfer of a large data buffer (3MByte-10MByte) between the CA7 core and the CM4 core.  I unders...

We are using the STM32MP15 ecosystem 2.1.0 and buildroot build flow for a custom board.  The custom board uses the FMC peripheral to connect to three FPGAs using an SRAM/PSRAM interface.  We have successfully implemented this interface on the CA7 sid...