About pshin.1

pshin.1 · 2020-11-02

Hi,I am using LSM6DSL in my project. FIFO is configured for the same and host processor receives the interrupt after FIFO threshold is reached. I have also configured the pulsed mode for the interrupt. After receiving an interrupt, host controller r...

pshin.1 · 2020-10-27

Hello,In my application, I need LSM6DSL to generate an interrupt when configured FIFO threshold is reached. I am using FIFO for accelerometer and gyroscope.My configuration is as below,FIFO_CTRL5 = 0x09 // ODR 12.5 Hz, FIFO modeCTRL3_C = 0x 44 //BDU,...

pshin.1 · 2020-11-06

Hi Eleon,I am observing this behavior consistently during my test.I am configuring the FIFO in bypass mode initially and then switching to FIFO mode only once.To be more specific about the issue, if there is a delay while reading the FIFO output data...

pshin.1 · 2020-11-06

Hi Eleon,Yes, Issue 2 is related to the other post from me.I am also able to suppress DRDY interrupts after deliberately setting the corresponding bit to zero.We can close this thread and can discuss the specific issue on the other thread.Regards, Pr...

pshin.1 · 2020-10-29

Hi @Eleon BORLINI ,Yes. CTRL1_C refers to CTRL1_XL and CTRL2_C refers to CTRL2_G .INT1 pin is physically connected to host processor(Checked for continuity).I cannot route the signal on INT2 pin as of now since it requires some hardware modification...

pshin.1 · 2020-10-27

Hi Eleon,I tried out your suggestions and the outcome is as below,Configure the routing of the interrupt at the end of the configuration flow --> INT1_CTRL = 0x08 //Route fth signal on INT1 pin after the other commands -No interrupt received...

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LSM6DSL interrupt is getting latched after some time.

Not receiving FIFO threshold interrupt in LSM6DSL

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Re: Not receiving FIFO threshold interrupt in LSM6DSL