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Posted on February 17, 2018 at 02:53/******************************* Unlock and set clock sources **********************/PWR->CR = (1<<8); //Disable Backup Domain write protectionRCC->BDCR |= RCC_BDCR_RTCEN;    //RTC clock enabledRCC->BDCR |= RCC_BD...
Posted on November 24, 2017 at 02:59On F446RC, sysreset does not put bit 19 into default setting of 0, its stuck on 1 if 1 is written previously.Procedure to set and clear bit:RTC->CR = (0<<19);   //Clear bit19, 512hz modeRTC->CR = (1<<19);   //Set ...
Posted on October 04, 2017 at 04:21STM32F4xx1: Do 8bit DAC mode have same specifications as the 10bit mode?2: The 3.3V / 1.5MOhm = 2.2 µA load for 1% accuracy as spec'ed in manual is for internal    buffer off , i had assumed no load at all would g...
Posted on August 24, 2017 at 04:50In STLink settings menu we can chose JTAG or SWD but which JTAG and SWD mode is it?Full SWJ (JTAG-DP + SW-DP) - Reset StateFull SWJ (JTAG-DP + SW-DP) but without NJTRSTJTAG-DP Disabled and SW-DP EnabledTrying to fig...
Posted on August 21, 2017 at 03:58Surely this issue has been beaten to death already?SPI3:Are there any known 'end of byte/word transmit' function (soft/hardware)working on SPI3 in master mode? Actually in 'any' mode,  im just doingsimple plain peri...