About Riscy

Riscy · 2024-01-24

I have build the project with Nucleo_U5A55ZJ-Q with 1.4.0 and 6.2.0 library from the start, following the example code (working) with IOC setup (USBPD and USBX). After fixing the CSRST issue earlier with missing __HAL_RCC_SYSCFG_CLK_ENABLE() but I n...

Riscy · 2024-01-20

I have an eval board (Nucleo STM32U5A5) working with the CDC_ACM demo code (UCPD/USB_HS, which was written in 2021). I then created the CDC_ACM from scratch with the majority of IOC parameters's configuration copied over from the demo IOC and MOOC tu...

Riscy · 2024-01-11

I struggled with the difference between STM32U5G9J-DK2 and STM32U5G9J-DK1. The STM32U5G9J-DK2 link to the STM website is not working or is missing. It seems to me the STM32U5G9J-DK2 is a newer, cheaper variant, but what is the difference with DK1? I ...

Riscy · 2024-01-10

I found the CubeIDE (1.14.0) along with CubeMX (6.10.0-RC9) impose size limit of 192K in RAM1 where in fact there 738K SRAM1. Is there a reason for these constraints under Azure FileX?Thanks.

Riscy · 2024-01-10

I have written quite a bit of code to familiarize myself better with Azure FileX with 192K sram, and so far, it is working well under ThreadX. The Azure FileX documentation made clear that FAT12 has a maximum number of bytes of 4096 per filename whic...

Riscy · 2024-03-17

Any progress or solution for this query, thanks.

Riscy · 2024-03-06

Hi, by any chance to provide update status of the ticket 174247?.

Riscy · 2024-02-22

Thank you; I found it: USBPDCORE_NOPD_CM33_wc32.a but it is not readable with Notepad++ or CubeIDE. I tried Segger Ozone, but it showed garbage.I found there Objdump, which is a disassembler, but this works for Linux, which I lacks.Any suggestion on ...

Riscy · 2024-02-22

Yes, that is correct. It did say a mixture of V120 and V130 there.The current revision today is V141; I can see moderate change from earlier in the way CubeMX generates them. It would be great to have it updated demo of V140/V141 if possible.

Riscy · 2024-02-21

Thank you for processing this issue. Can you ask the team to generate a working solution in the form of a demo code or an example-based CDC_ACM based on the V140/141 setup for STM32Cube IDE/MX for the U5A5 device? I think the changes from V130 to V14...

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STM32U5 - USB CDC UART not working: USBPD_DPM_CADCallback(..) is not calling

STM32U5A5 (Cube 1.14.1): CDC_ACM & USB_HS with USBX issue with CSRST not self clearing

STM32U5G9J-DK2

STM32U5A5 CubeMX: SRAM1 has 738K while it restricted to 192K under Azure FileX

STM32U5A5: Azure FileX FAT12 with more than 4096 byte (or 4096 cluster of 512 byte)

Re: STM32U5 - USB CDC UART not working: USBPD_DPM_CADCallback(..) is not calling

Re: STM32U5A5 (Cube 1.14.1): CDC_ACM & USB_HS with USBX issue with CSRST not self clearing

Re: STM32U5 - USB CDC UART not working: USBPD_DPM_CADCallback(..) is not calling

Re: STM32U5A5 (Cube 1.14.1): CDC_ACM & USB_HS with USBX issue with CSRST not self clearing

Re: STM32U5A5 (Cube 1.14.1): CDC_ACM & USB_HS with USBX issue with CSRST not self clearing