About CBecc.1

CBecc.1 · 2022-04-21

Hi All,I'm working on a STM32H7 custom board and I'm trying to access a Cypress S70KL HyperRam through the Hyperbus protocol using the OCTOSPI1. I'm able to access in read/write the HyperRam but I want to use the delay block therefore in CubeMx I ena...

CBecc.1 · 2022-09-19

Hi Alberto. Thanks for you reply.I worked on a custom board with STM32H7B3. I suspect it might be different from your SoC even if I didn't check...I struggled a lot as you but my problem was not the free running clock setting (done correctly). The pr...

CBecc.1 · 2022-07-08

Thanks a lot!

CBecc.1 · 2022-07-08

Hi Alex,thanks for your reply...Yes sure you need to enable SEN and DEN to allow the Delay Block validate the setting but the problem here is that you need a free running clock to validate any setting and the Delay Block Input must be connected to th...

CBecc.1 · 2022-07-07

Hi Alex, thanks for your reply.My issue is not about the hyperarm itself but the delay block since in the STMH7B3 it must be tuned before doing any delay setting. I mean I cannot set the CFGR register without tuning the delay block because the valid ...

CBecc.1 · 2022-04-26

Ok thanks. I will try to adapt those functions and I'll let you know how it will go...Those are definitively different from what is generated here so it's worth a try...I will adapt them and try...Thanks again

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STM32H7 OCTOSPI mode Hyperbus, HyperRam access and Delay Block Configuration (LNGF doesn't get set)

Re: STM32H7 OCTOSPI mode Hyperbus, HyperRam access and Delay Block Configuration (LNGF doesn't get set)

Re: STM32H7 OCTOSPI mode Hyperbus, HyperRam access and Delay Block Configuration (LNGF doesn't get set)

Re: STM32H7 OCTOSPI mode Hyperbus, HyperRam access and Delay Block Configuration (LNGF doesn't get set)

Re: STM32H7 OCTOSPI mode Hyperbus, HyperRam access and Delay Block Configuration (LNGF doesn't get set)

Re: STM32H7 Delay Block Configuration (LNGF does not get set)