Posted on December 08, 2012 at 23:17I'll refer to the RM0033 Doc ID 15403 Rev 5 page 826 last paragraph: ''When the SOF is detected, the MAC accepts the data and begins transmitting to the MII'' Does it mean that SOF(SFD =0xD5?) has to be part of t...

Posted on December 08, 2012 at 22:19Subject says it all. Just for clarity if length of my frame is 1024 bytes what should I put into tx buffer:  0x1000(Big Endian) or 0x0010(Little Endian)? I do know that ethernet itself is BE and MCU is LE, so does...

Posted on November 25, 2012 at 02:41Why application needs to copy ethernet frame to the TX buffer first and then DMA will move it to the MAC fifo? Why is it bad idea to set up DMA to read the frame directly from application? Just want to know the re...

Posted on November 16, 2012 at 14:42All my information is based on RM0033 Doc ID 15403 Rev 5 11/2012. 1. Start will be issued after setting by writing START bit to I2C_CR1 register CR1(START) as soon as SR2(BUSY) is cleared? The document says only ...

Posted on November 11, 2012 at 23:46Reading UM0033, page 138, figure 14. Sorry, can not exactly understand it. For example,  I want to connect C.8 to CAN1_TX and C.9 to CAN1_RX. I see AF9 (CAN1/CAN2, TIM12..14). and need to use GPIOC_AFRH(LSB) GPIO...