Posted on April 22, 2016 at 12:44
I start with stm32f746g-disco
http://www2.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32f746gdiscovery.html. For ex...
Posted on July 01, 2012 at 13:57Hi, everyone. Testing STM32F407. Runs it at 168 MHz (5.92 ns cycle), FLASH-> ACR = FLASH_ACR_DCEN | FLASH_ACR_ICEN | FLASH_ACR_PRFTEN | FLASH_ACR_LATENCY_5WS. Outstanding at the PA1 a simple square wave: PM_(RCC->AHB...
Posted on July 01, 2012 at 13:32 Hi, everyone. I'm testing on fsmc stm32f407VG. I use the Address / Data multiplexed on databus (MUXEN = 1). 2 modes of testing EXTMOD = 0 and 1. Initialization: FSMC_Bank1->BTCR[0] = //FSMC_BCR2_EXTMOD | ...
Posted on June 23, 2012 at 20:51Hi, everyone. I do not understand why ''RCC AHB peripheral reset register'', such as RCC-> AHB1RSTR | = RCC_AHB1RSTR_GPIOARST, what will GPIOA? Thank you.
Posted on July 04, 2012 at 20:41I only use stm32f4discovery, the signals look oscilloscope (a bug in the hardware can not be). I have two programs differ only in one line (bug in the software may not be): FSMC_Bank1-> BTCR [0] = / / FSMC_BCR2_EXTMOD...
Posted on July 04, 2012 at 20:34> Clive1, Sunday, July 01, 2012 3:21 PM > Perhaps the pipeline stall is charged to the first store, along with whatever cache / prefetch introduces. Thank you. I use Z revision. I read STM PM0081 Flash memory interfac...
