Posted on September 22, 2012 at 03:30I'm familiar with using alternate function inputs on the STM32F1 series; the associated GPIO pin is set as an input (CNFx[1:0], MODEx[1:0] bits), AFIO clock is enabled, and the AFIO->MAPR register is set appropri...

Posted on May 12, 2012 at 00:44I would like to use the SPI CRC capabilities to generate the CRC7 byte for a SD SPI command frame.  The command frame is 6 bytes long, with the final CRC byte structure as follows:CRC[7:1] -- CRC7 of first 5 bytes of c...

Posted on May 01, 2012 at 07:54 I would like to understand what the I2C TRISE register does. The standard peripheral library effectively sets it to either: I2Cx->TRISE = PCLK1 / 1000000 + 1; or I2Cx->TRISE = (PCLK1/1000000*...

Posted on January 26, 2012 at 01:28The STM32F10x series of MCU's make use of the ARM Private Peripheral Bus address 0xE0042000 to implement a MCU IDCODE with a revision ID and a device ID.  I am using the STM32W, and nowhere in the documentation can...

Posted on September 09, 2011 at 00:16In all the startup scripts provided by the ST standard peripheral library, there is an entry at the end that is:  .word  BootRAM     /* @0x1E0. This is for boot in RAM mode for STM32F10x Connectivity line Devices...