Posted on July 29, 2008 at 05:01I don't know what have you tried before, but did you try to calibrate the ADC before taking samples of the voltage? There's a section in the ADC section of the reference manual that explains how to do it.
Posted on July 24, 2008 at 09:48Did you try to set the ports as analog input? BTW, the method for calibrating the adc is in the ADC section of the reference manual. However, there is no library or routine that makes the work for you. You'll have to ...
Posted on July 22, 2008 at 09:26Hi all, We are developing a custom board based in STR710, where low power consumption is a must. We need the processor to wake-up quickly so we used STOP mode. When I put the processor in STOP mode, i switch off the M...
Posted on March 11, 2008 at 07:51Hi Tim, Maybe it's an obvious answer, but did you set the ports 2.0 - 2.4 (which are chips selects for emi banks) to AF? You should do the same with the ports 2.4 to 2.7, which correspond to lines A.20 to A.23.
Posted on March 07, 2008 at 03:53It depends on MCLK. If you low the clock on a 25%, I suppose you should increment the wait state in a 25%, so I'll consider a value of 13. However, you'll get the best value though a trial-error procedure :-]
