STM8 RRCW instruction incorrect results

[whitehorsesoft]

Greetings, I'm attempting to use the RRCW (Rotate Word Right Logical through Carry) instruction (op code 56), but it is giving unexpected results on bit 15.

The documentation on PM0044 (pg 138/162) says: "Bit 15 of the result is a copy of the CC.C bit value before the operation." Later in the same page it says for the CC.C bit: "C ⇒ b0 Set if, before the shift, the MSB of register or memory was set, cleared otherwise." I take this to mean this op code will take 0b0000000000000001, and result in 0b1000000000000000. However, what I get instead varies, but most often results in either 0b000000000000000 (entire word cleared) or 0b110000000000000 (two bits out of word set).

The following assembler uses asxxxx, but regardless of the specific assembler used I can confirm the actual bytes sent to program flash are for op code 56 in this situation:

ldw x, #0x1
rrcw x ; 0b1000000000000000, good
rrcw x ; 0b1100000000000000, bad
rrcw x ; 0b0110000000000000, bad

[AA1 · Accepted solution]

RRCW produces correct results. Bit 15 of result is equal to initial carry and final carry is equal to initial bit 0. PM0044 page 138 have a mistake. Instead of MSB should be LSB. See page 137 for RRC instruction. So final carry is equal to initial LSB.

ldw x, #0b0000000000000001
       ; in your example here carry is 1
rrcw x ; 0b1000000000000000, good and carry is 1 because initial bit 0 is 1
rrcw x ; 0b1100000000000000, good and carry is 0 because initial bit 0 is 0
rrcw x ; 0b0110000000000000, good and carry is 0 because initial bit 0 is 0

[whitehorsesoft]

Thank you so much for the reply, let me make sure I understand. During RRCW, bit 15 of the destination register is set to whatever CC.C is when the instruction is called?

It sounds like if I want to rotate only once, but have bit 0 automatically go to bit 15, I need to do extra instructions to check and manipulate the CC.C bit.

Which leads me to ask, what situation would a RRCW serve that a shift right (especially SRLW) would not with as efficient cycles/memory or better? Given what I know now about RRCW and the CC.C manipulation, I'm having trouble imagining a situation where RRCW be the instruction of choice over other options.