2010-03-23 04:49 AM
STM8 Analog voltage stress
2011-05-17 06:07 AM
I don't think your Vref- pin can be brought low enough to sample -1 VDC. (spec sheet says Vref- min is = Vssa). You may have to level shift your signal until your low end is 0 V, which would make your range 0 - 7 V. The absolute max for Vref+ is = Vdd, which is 6.5 V, so it would seem like you would also need to scale down your signal using something as simple as a 2-resistor voltage divider.