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Is there any pre-requirments on using PC0 & PC1 as GPIO PP in STM8L051?

SSin.1
Associate II

Hi all,

I am trying to use STM8L051 port c pin 0 as an output to drive a NPN. But I find that PC0 & PC1 cannot be set by using ST HAL library. All the registers seems ok (DDR, ODR, CR1 & CR2). And PC4,5,6 can be driven. Can anyone please give me a hand by providing some hints? AHere are the code:

#include "stm8l15x.h"
#include "main.h"
 
void delay_ms(uint16_t u16_ms)
{
  for(uint16_t u16_a = 0; u16_a < u16_ms; u16_a++)
  {
    for(unsigned short u8_a = 0; u8_a < 37; u8_a++)
    {
      nop();
    }
  }
}
                 
void main(void)
{
  CLK_SYSCLKDivConfig(CLK_SYSCLKDiv_64);
 
  /* Select HSI as system clock source */
  CLK_SYSCLKSourceSwitchCmd(ENABLE);
  CLK_SYSCLKSourceConfig(CLK_SYSCLKSource_HSI); // CLK_SYSCLKSource_HSI
 
  while (CLK_GetSYSCLKSource() != CLK_SYSCLKSource_HSI);
  
  GPIO_Init(GPIOC,GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6, GPIO_Mode_Out_PP_Low_Slow);
  while(1)
  {    
    GPIO_SetBits(GPIOC,GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6);
    delay_ms(1000);
    GPIO_ResetBits(GPIOC,GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6);
    delay_ms(1000);
  }
}

1 ACCEPTED SOLUTION

Accepted Solutions

Oops, sorry, I got it mixed up with the STM8S family library.

You are right, of course, but you should take into account that on the STM8L051 exactly two pins are so-called true open drain ports - PC0 and PC1. The RM0031 writes about this:

In the true open-drain I/Os, P-Buffer, weak pull-up and protection diode to VDD is not implemented.

This means: to drive an H-level at the output, you must connect an external pull-up, which provides the driving current for your npn BRT.

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

6 REPLIES 6
Peter BENSCH
ST Employee

Welcome, @SSin.1​, to the community!

For NPN you need an open-drain output. If you initialise the pins in line 25 as PP (push-pull), however, you logically have a push-pull output and no open-drain.

For initialisation instead of

GPIO_Mode_Out_PP_Low_Slow

please use e.g.

GPIO_Mode_Out_OD_HiZ_Slow

Hope that helps?

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
SSin.1
Associate II

Thanks for your help.

Sorry for my poor explaination, what I mean is something tlike this:

0693W00000Y7pIzQAJ.png

Peter BENSCH
ST Employee

Oh, I thought by NPN you meant an NPN of a PLC.

Please try it and replace

GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)

by

GPIO_WriteHigh(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins)

...and accordingly for GPIO_ResetBits --> GPIO_WriteLow.

Please note that GPIO_SetBits and GPIO_ResetBits with uint8_t requires a different type for the GPIO_Pin than GPIO_WriteHigh and GPIO_WriteLow (GPIO_Pin_TypeDef).

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
SSin.1
Associate II

Dear Peter,

Thanks a lot! But can you please kindly tell me where can I get the lastest ST offical HAL w/ GPIO_WriteHigh function? The version on my hand is v1.6.1, which doesn't contain GPIO_WriteHigh.

  * @file    stm8l15x_gpio.c
  * @author  MCD Application Team
  * @version V1.6.1
  * @date    30-September-2014

BTW, GPIO_SetBits has just one line

void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint8_t GPIO_Pin)
{
  GPIOx->ODR |= GPIO_Pin;
}

And it can change ODR. So what can I do to modity the function to make it works? Thanks.

Oops, sorry, I got it mixed up with the STM8S family library.

You are right, of course, but you should take into account that on the STM8L051 exactly two pins are so-called true open drain ports - PC0 and PC1. The RM0031 writes about this:

In the true open-drain I/Os, P-Buffer, weak pull-up and protection diode to VDD is not implemented.

This means: to drive an H-level at the output, you must connect an external pull-up, which provides the driving current for your npn BRT.

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Dear Peter,

Thanks a lot! sorry for missing such a point!