I2C lines

lyeganeh9 · ‎2009-03-02

Posted on March 03, 2009 at 08:09

I2C lines

lyeganeh9 · ‎2011-05-17

Posted on May 17, 2011 at 15:02

Hi

what differents are there bitween open drain

and true open drain outputs ?

should SDA and SCL i2c pins to be true open

drain type or not require if they want to

work right application?

thanks and regards

mozra27 · ‎2011-05-17

Posted on May 17, 2011 at 15:02

Hi,

the I/O configuration true open drain output is used by default on the I/O that need alternate function output.

An alternate function output can be push-pull or pseudo-open drain depending on the peripheral and Control register 1 (Px_CR1) and slope can be controlled depending on the Control register 2 (Px_CR2) values.

The alternate function output(true open drain output) configuration is not accessible by configure the controle register to the user, but is by default on the IP I/O that need this configuration when is enabled.

So, The SDA pin on I2C is by default true open drain output and you don't need to configure it.

Regards

mozra

jeffrey23 · ‎2011-05-17

Posted on May 17, 2011 at 15:02

Hi,

I tried to use PC.5/PC.6 as SCL/SDA pins of

bit-banging I2C instead of STM8S103F3 built-in hardware I2C mechanism.

void GPIO_Init (void)

{

// Init Port A

GPIOA->DDR = 0x08; // Set pin PA.3 output mode

GPIOA->CR1 = 0x08; // Set pin PA.3 pull-up

GPIOA->CR2 = 0x08; // Set pin PA.3 fast slope(max 10Mhz)

// Init Port C

/*

[2]101

7 6 5 4 3 2 1 0

| | | | | | | |

| | |___________ I2C SCL (Output) Open drain output

| |_____________ I2C SDA (Output) Open drain output

|_______________ VS (Input) Pull-up with interrupt

DDR 0 1 1 0 1 0 0 0

CR1 1 0 0 0 1 0 0 0

CR2 1 0 0 0 0 0 0 0

*/

GPIOC->DDR = 0x68;

GPIOC->CR1 = 0x88;

GPIOC->CR2 = 0x80;

// Setup Port D

/*

[2]101

7 6 5 4 3 2 1 0

| | | | | | | |

| | | |_________ VR0 (Output) Push pull output

| | |___________ VR1 (Output) Push pull output

| |_____________ VR2 (Output) Push pull output

DDR 0 1 1 0 0 0 0 0

CR1 0 1 1 0 0 0 0 0

CR2 0 0 0 0 0 0 0 0

*/

GPIOD->DDR = 0x70;

GPIOD->CR1 = 0x70;

GPIOD->CR2 = 0x00;

}

bool I2C_GetSDA (void)

{

u8 bSDA;

// Init Port C

/*

[2]101

7 6 5 4 3 2 1 0

| | | | | | | |

| | |___________ I2C SCL (Output) Push pull output

| |_____________ I2C SDA (Input) Floating without interrupt

|_______________ VS (Input) Pull-up with interrupt

DDR 0 0 1 0 1 0 0 0

CR1 1 0 1 0 1 0 0 0

CR2 1 0 0 0 0 0 0 0

*/

//GPIOC->DDR = 0x28; // Case(1)

bSDA = GPIOC->IDR & 0x40;

// Init Port C

/*

[2]101

7 6 5 4 3 2 1 0

| | | | | | | |

| | |___________ I2C SCL (Output) Open drain output

| |_____________ I2C SDA (Output) Open drain output

|_______________ VS (Input) Pull-up with interrupt

DDR 0 1 1 0 1 0 0 0

CR1 1 0 0 0 1 0 0 0

CR2 1 0 0 0 0 0 0 0

*/

//GPIOC->DDR = 0x68; // Case(2)

return( bSDA );

} /* I2C_GetSDA */

Do you mean that the Case(1) and Case(2) can be

removed ? Is it possible to use STM8S103F3 PB.4/PB.5 as

bit-banging I2C SCL/SDA ?

Q1) How to implement bit-banging I2C using STM8S103F3 ?

Q2) Can the STM8S103F3 support the quasi-bidirection pins as 8051 MCU ?

Q3) Can PB4/PB.5 be used as PC.5/PC.6 for bit-banging I2C pins ?

Q4) May I use PB4/PB.5 be used as normal open drain pins instead of I2C ? How to setup it ?

jeffrey23 · ‎2011-05-17

Posted on May 17, 2011 at 15:02

Hi,

We used the SDA to read/write I2C data.

Do we need to re-configure the DDR direction

for Input/Output data ?

mozra272 · ‎2011-05-17

Posted on May 17, 2011 at 15:02

Hi,

The I2C pins is by default true open drain output and you don't need to configure it. This configuration is forced internally when enabling the peripheral and the values in the DDR, CR... registers are not significant (by default you see that the I/O is configured as floating input)

Regards

mozra