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How to enable and disable a maskable interrupt from inside an ISR in stm8A

raja1
Associate II

Hello all. 

 

I have an ISR inside which I want to disable and enable interrupts.

 

Reference manual says : 

 

https://www.st.com/resource/en/reference_manual/rm0016-stm8s-series-and-stm8af-series-8bit-microcontrollers-stmicroelectronics.pdf

 

Disabling the interrupts

#asm
PUSH CC
POP ISR_CC(1)
SIM
#endasm

Enabling the interrupts

#asm
PUSH ISR_CC(1)
POP CC
#endasm

I want to achieve mutual exclusion. I have tried using sim and rim and it works for now.

However the above method got me confused. 

What do I do for POP ISR_CC ? 

Please suggest me exact ways. 

I have found this inside a blog. Is it correct?

uint8_t atomic_begin(void) __naked {
__asm
; Copy CC value, put in A reg for return value, and disable all interrupts.
push cc
pop a
sim
ret
__endasm;
}

void atomic_end(const uint8_t istate) {
(void)istate;

__asm
; Restore CC from arg value in A reg.
push a
pop cc
__endasm;
}
1 ACCEPTED SOLUTION

Accepted Solutions
raja1
Associate II

I was using cosmic c compiler.

 

I did the following modifications for cosmic C and stvd.

 

uint8_t atomic_begin(void) 
{
#asm
; Copy CC value, put in A reg for return value, and disable all interrupts.
push cc
pop a
sim
#endasm;
}

void atomic_end(const uint8_t istate) {
(void)istate;

#asm
; Restore CC from arg value in A reg.
push a
pop cc
#endasm;
}

//Usage is as follows
ISR()
{
uint8_t ISR_CC_ret =  atomic_begin();
//execute your ISR
atomic_end(ISR_CC_ret);
}

View solution in original post

2 REPLIES 2
raja1
Associate II

 

 

uint8_t atomic_begin(void) __naked {
	__asm
		; Copy CC value, put in A reg for return value, and disable all interrupts.
		ld a,cc
                push cc
		pop a
		sim
		ret
	__endasm;
}

void atomic_end(const uint8_t istate) {
	(void)istate;

	__asm
		; Restore CC from arg value in A reg.
                ld cc,a
		push a
		pop cc
	__endasm;
}

 


@raja1 wrote:

Hello all. 

 

I have an ISR inside which I want to disable and enable interrupts.

 

Reference manual says : 

 

https://www.st.com/resource/en/reference_manual/rm0016-stm8s-series-and-stm8af-series-8bit-microcontrollers-stmicroelectronics.pdf

 

Disabling the interrupts

 

#asm
PUSH CC
POP ISR_CC(1)
SIM
#endasm

 

Enabling the interrupts

 

#asm
PUSH ISR_CC(1)
POP CC
#endasm

 

I want to achieve mutual exclusion. I have tried using sim and rim and it works for now.

However the above method got me confused. 

What do I do for POP ISR_CC ? 

Please suggest me exact ways. 

I have found this inside a blog. Is it correct?

 

uint8_t atomic_begin(void) __naked {
__asm
; Copy CC value, put in A reg for return value, and disable all interrupts.
push cc
pop a
sim
ret
__endasm;
}

void atomic_end(const uint8_t istate) {
(void)istate;

__asm
; Restore CC from arg value in A reg.
push a
pop cc
__endasm;
}

 


Does this make sense?

 

raja1
Associate II

I was using cosmic c compiler.

 

I did the following modifications for cosmic C and stvd.

 

uint8_t atomic_begin(void) 
{
#asm
; Copy CC value, put in A reg for return value, and disable all interrupts.
push cc
pop a
sim
#endasm;
}

void atomic_end(const uint8_t istate) {
(void)istate;

#asm
; Restore CC from arg value in A reg.
push a
pop cc
#endasm;
}

//Usage is as follows
ISR()
{
uint8_t ISR_CC_ret =  atomic_begin();
//execute your ISR
atomic_end(ISR_CC_ret);
}