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How STM8S001J3 use BOR function?

Winter_Max
Associate

Hello. I am using the STM8S001J3 MCU.

 

I want to use the reset function in my MCU.

 

stm8 has a total of 9 Reset functions.

●External reset through the NRST pin

● Power-on reset (POR) and brown-out reset (BOR): During power-on, the POR keeps the device under reset until the supply

.

.

.

Among them, I want to use POR and BOR functions

 

How do I use the BOR function in the stm8 (STM8S001J3) MCU?

 

The Datasheet only describes concepts.

 

And which program should I use to set the POR and BOR functions?

 

Let me explain the problem I have.


The MCU (stm8) uses the pwm out function using GPIO, but there are many cases where the pwm out does not work due to the 5V High signal.

 

Therefore, I want to reset the MCU whenever the 5V High signal comes out.

 

1 ACCEPTED SOLUTION

Accepted Solutions
Peter BENSCH
ST Employee

Welcome @Winter_Max, to the community!

The POR and BOR functions are not configurable, a description can be found in RM0016, section 8.3.1.

Regarding your problem, you write: "there are many cases where the pwm out does not work due to the 5V High signal". What do you mean by "5V high signal", where does it come from and when does it occur?

By the way, what is stopping you from using the Independent Watchdog Timer (IWDG) to trigger the reset if the IWDG is not triggered within an adjustable period of time? Here you should note the tolerance of LSI (128kHz), which you can find in the data sheet.

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

1 REPLY 1
Peter BENSCH
ST Employee

Welcome @Winter_Max, to the community!

The POR and BOR functions are not configurable, a description can be found in RM0016, section 8.3.1.

Regarding your problem, you write: "there are many cases where the pwm out does not work due to the 5V High signal". What do you mean by "5V high signal", where does it come from and when does it occur?

By the way, what is stopping you from using the Independent Watchdog Timer (IWDG) to trigger the reset if the IWDG is not triggered within an adjustable period of time? Here you should note the tolerance of LSI (128kHz), which you can find in the data sheet.

Regards
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.