Posted on August 02, 2015 at 11:04The text claims that incw y writes x and thus Figure 12 shows a pipline stall at the following ld a, (x). But incw y does not write x, and in fact Figure 12 does not show a pipline stall.
I suggest to fix this section, and also add an additional section showing what happens when a memory write is followed by a read (e.g. push followed by pop).
Philipp
