How can I configure my F446RE clock to run at 180 MHZ?

[SCamp.1041]

This continues to be a confusing topic for me. I am slowly beginning to understand how the MCU Clock Configuration tab works in CubeMX, but I could use a little clarity before I start tweaking all these values.

Here is my current clock configuration:

 

I have an 8 MHZ external clock connected to PH0 and PH1, which I entered into the HSE block.

Now, if I want my MCU to run at its max speed of 180 MHZ, which part of this clock configuration should I change?

I feel like all I need to do is change the HCLK value to 180, but looking at the diagram it appears that the HCLK is being fed by the SYSCLK, which is set to 16 MHZ. So would I also need to set SYSCLK to 180 MHZ? Or is there some magic clock multiplication occurring between the SYSCLK and the HCLK?

😅

[KnarfB · Accepted solution]

Just enter a 180 in the HCLK box, press ENTER and let CubeMX do the rest. In your above picture, the HSE clock is not used. Yo umay select it manually beforehand. And, you are right, the System Clock Mux will use the PLL clock for high freq. clocking which also increases SYSCLK.

hth

KnarfB

[SCamp.1041]

Interesting. So I have been using the Internal 16 MHZ Crystal this whole time?

What about this configuration?

 

To my understanding, I am now using the external 8 MHZ crystal which then gets multiplied by the PLL which then feeds the SYSCLK.

Does CubeMX automatically set all the peripheral clocks to their maximum? Or can I jump them up to 180 MHZ too?

[TDK]

> So would I also need to set SYSCLK to 180 MHZ? Or is there some magic clock multiplication occurring between the SYSCLK and the HCLK?

Yes. There's no magic, just what you see in the clock tree. There is a divisor between the two but it's usually set to /1.

You need to se the System Clock Mux to PLLCLK and adjust the PLL settings to get 180 MHz. Or let CubeMX do it for you as KnarfB suggested.

[Tesla DeLorean]

You get there via the factors in the PLL

The VCO frequency needs to be 360 MHz, it is a PULSE generator, so needs a minimum DIV2 to get a viable 50/50 duty signal to clock the reset of the IC

As I recall the PLL comparison frequency is between 1 and 2 MHz.

The math to compute factors is not unduly hard, most of us could do this in our heads or with simple fitter/solver apps prior to CubeMX

Select the HSE value, and clock coming out of the PLL, and it can back-compute the factors

[SCamp.1041]

What about the code generated by CubeMX in the `SystemCoreClockUpdate()`?

 

This is referencing pre-defined constants in `stm32f4xx_hal_conf.h`.

I can't tell if this function is getting called by anything or not. If it is, then I would have to update the constants in `stm32f4xx_hal_conf.h` to achieve the correct configurations

[TDK]

That calculates the core clock based on current register settings. It doesn't change anything. SystemCoreClock is just a variable.

The chip always boots up using the 16 MHz HSI as the system clock.

Clock configuration is changed in SystemClock_Config() within main.c by default.

[KnarfB]

you config looks good.

KnarfB

[SCamp.1041]

right - so this function can be ignored? Or are you saying that this function gets called when the chip first boots up, and then SystemClock_Config() re-configures the clock when the program starts?

[TDK]

I'm not sure what you want to do with that function. You shouldn't need to use it.

SystemCoreClock is initialized to 16000000 in system_*.c. Because that's the clock speed on startup, there's no need to call this function.

SystemClock_Config() changes the clock at the start of main() and from within there, HAL_RCC_ClockConfig() is called and from within there, SystemCoreClock is updated.