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HermannKleier
HermannKleier
Associate III
November 4, 2016
Solved

CubeMX creates broken SystemClock_Config()

  • November 4, 2016
  • 3 replies
  • 1167 views
Posted on November 04, 2016 at 13:42

In STM32Cube MX 4.17 I have set up an empty STM32L476 Nucleo project with and created code for the Low-Layer API. The parameters were:

  • LL_PWR_REGU_VOLTAGE_SCALE2
  • LL_RCC_MSIRANGE_8
The function 

SystemClock_Config()

of the generated code starts with 

void SystemClock_Config(void)
{
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2);
LL_RCC_MSI_Enable();
/* Wait till MSI is ready */
while(LL_RCC_MSI_IsReady() != 1)
{
}
LL_RCC_MSI_EnableRangeSelection();
LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_8);
LL_RCC_MSI_SetCalibTrimming(0);
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
Error_Handler(); 
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
⋮

The documentation (DocID024597 Rev 4, section 5.1.7 Dynamic voltage scaling management) reasonably states that the FLASH latency must be set up before the core voltage is changed. However the function SystemClock_Config() does it the other way around. This may work under limited conditions… #cubemx-flash-latency
This topic has been closed for replies.
Best answer by Sirma Siang
Posted on November 16, 2016 at 11:01

Hello Kleier.hermann,

I want first to thank you for your bug reporting.

This help us a lot to improve our product quality.

I confirm that this has been solved, and will be available in the next cube release.

Kind regards

Sirma

3 replies

Nesrine M_O
Nesrine M_O
Associate
November 10, 2016
Posted on November 10, 2016 at 15:34

Hi kleier.hermann,

Thank you for your feedback. The issue has been reported internally.

-Syrine-

Sirma Siang
Sirma SiangBest answer
ST Employee
November 16, 2016
Posted on November 16, 2016 at 11:01

Hello Kleier.hermann,

I want first to thank you for your bug reporting.

This help us a lot to improve our product quality.

I confirm that this has been solved, and will be available in the next cube release.

Kind regards

Sirma

Sebastian O.
Sebastian O.
Visitor II
March 31, 2017
Posted on April 01, 2017 at 00:13

CubeMX v 4.0

STM32CubeL1 Firmware Package V1.6.0 / 01-July-2016

STM32L151

CubeMX is generating broken SystemClock_Config when HSE is selected to source other than MSI.

RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5; is missing when ussing HSE(next code block below).

HAL_RCC_OscConfig uses RCC_OscInitStruct.MSIClockRange when RCC_OSCILLATORTYPE_MSI is set to RCC_OscInitStruct.OscillatorType

lack of inicialisation of MSIClockRange couses to error in HAL_RCC_OscConfig when calculating SystemCoreClock:

stm32l1xx_hal_rcc.c line 475:

(RCC_OscInitStruct->MSIClockRange have value: 0x10000000, viewed in debug)

SystemCoreClock = (32768U * (1U << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_BITNUMBER) + 1U))) >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_BITNUMBER)];

this couses SystemCoreClock = 65536( but is should be i.e. 2097152) and in conseqence systick-load value to 64, what breaks the system

When MSI is selected for clock source everything is ok:

void SystemClock_Config(void)
{
 RCC_OscInitTypeDef RCC_OscInitStruct;
 RCC_ClkInitTypeDef RCC_ClkInitStruct;
 /**Configure the main internal regulator output voltage 
 */
 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 /**Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI;
 RCC_OscInitStruct.MSIState = RCC_MSI_ON;
 RCC_OscInitStruct.MSICalibrationValue = 0;
 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
 /**Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 {
 Error_Handler();
 }
 /**Configure the Systick interrupt time 
 */
 HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
 /**Configure the Systick 
 */
 HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
 /* SysTick_IRQn interrupt configuration */
 HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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When HSE is selected for clock source:

void SystemClock_Config(void)
{
 RCC_OscInitTypeDef RCC_OscInitStruct;
 RCC_ClkInitTypeDef RCC_ClkInitStruct;
 /**Configure the main internal regulator output voltage 
 */
 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 /**Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
 |RCC_OSCILLATORTYPE_MSI;
 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 {
 Error_Handler();
 }
 /**Initializes the CPU, AHB and APB busses clocks 
 */
 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 {
 Error_Handler();
 }
 /**Enables the Clock Security System 
 */
 HAL_RCC_EnableCSS();
 /**Configure the Systick interrupt time 
 */
 HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
 /**Configure the Systick 
 */
 HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
 /* SysTick_IRQn interrupt configuration */
 HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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