How to configure debug for JLink using flash banks?

[leofocuy]

Hello, I am working with an STM32U5A9NJ, and I have a working elf file that I can load using Ozone. Ozone lets me configure flash banks when I create the project, but it does not seem to have the same feature in STM32IDE. How can I  do this in STM32IDE?

If I try setting the debug probe to JLink, I get a hard fault condition, and I believe it is because of this.

Thanks,

[SMarie]

Hi,

Have you tried with the STM32xxxx_FLASH.ld file ?

[leofocuy]

No, I have not looked into that... The one I am using was created by CubeMx and it works fine with ST Link. Do I need to change something to make it compatible with Segger?

[SMarie]

That's the linker script that gcc is using to generate the elf file.

You asked how to configure the flash banks, in that .ld you can find something like that:

/* Specify the memory areas */
MEMORY
{
  FLASH (rx)     : ORIGIN = 0x08000000, LENGTH = 512K
  FLASH2 (rx)    : ORIGIN = 0x08100000, LENGTH = 512K
  DTCMRAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 128K
  RAM_D1 (xrw)   : ORIGIN = 0x24000000, LENGTH = 512K
  RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
  RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
}

In this example, FLASH and FLASH2 are two banks, you can modify their origin addresses or their lengths.

Its only for the compiler and as nothing to do with the ST-Link or the J-Link.

[leofocuy]

Ok, from what you are saying, the same ld file should work fine with either JLink or STLink. So, is there something else that might make my code go to hard fault using J-Link but work ok with STLink from the STM32IDE?

By the way, JLink works ok using Ozone and the same platform.

[SMarie]

When you change probe, do you also change the Debug Configurations ?

[leofocuy]

Well, I am following this https://wiki.segger.com/STM32CubeIDE and setting the following:

SWD, 4000 Hz

Reset Type 0

Enable Live Expressions and Verify Flash Download.

The code uses FreeRTOS, which is quite similar to the one in the STM32U5A9 dev kit sample code. However, I tried enabling different options in RTOS Kernel Awareness, but none seem to work.

[SMarie]

What error exactly do you get ?
Could you detail exactly what you're trying to do and what you do in both cases ?

[leofocuy]

Hello again. The exact issue is that I can not use JLink in STM32Ide for debugging purposes...

The setup is STM32IDE, Segger JLink and STM32U5A9J custom board using FreeRTOS... The configuration in STM32 IDE (scenario 1) is:

- Debug Probe Segger JLink

- SWF 4000 kHz, STM32U5A9NJ

- Reset: Type 0 Normal

- SWV and RTOS disabled

- Enable Live expressions and verify download enabled

- JLink Script:

void ConfigTargetSettings(void) {
JLINK_CPU = CORTEX_M33;

JLINK_ExecCommand("DEVICE_SelectLoader BankAddr=0x90000000 Loader=CLK@PF10_nCS@PA2_D0@PF8_D1@PF9_D2@PF7_D3@PF6");

return 0;
}

This configuration loads the code, downloads it and it seems to be verifying it ok but I get the following error and it goes to hard fault:

ERROR: Timeout while preparing target, RAMCode did not respond in time!
Failed to perform RAMCode-sided Prepare()

Scenario 2 is using Ozone with the same loader configuration and it works fine... I would like to STM32IDE it seems to allow more features and I am currently having issues to add a breakpoint in an ISR.

[SMarie]

Did you verify that GDB Connection Settings correspond to your set up? (ex: Autostart local GDB server)
Did you try to update your Segger J-Link package ?
Have you tried without enabling the use of the J-Link script file ?