2019-09-25 10:19 PM
Dear team,
We have a design with stm32mp157aac MPU, and we use MIPI DSI as the display interface to a device with 1280x720@60 RGB888, the PCLK is 74.25MHz, the DSI works at non-burst sync event video mode. But the image is flickering continously.
When we adjust the frame rate to 50Hz, PCKL is still 74.25MHz, the UI is not flickering continously any more, but it's not be compatible with most monitors.
We have tried to test with video mode test pattern by setting 0x5a000038, we got the same result. The only difference of these two mode is the register 0x5a000050. The register values are show below.
1280x720@60:
0x5a000038 : 0x13F01
0x5a00003c : 0x500 // 1280
0x5a000040 : 0
0x5a000044 : 0
0x5a000094 : 0x01
0x5a000048 : 0x3c
0x5a00004c : 0x149
0x5a000050 : 0x9A3
0x5a000054 : 0x5
0x5a000058 : 0x14
0x5a00005c : 0x5
0x5a000060 : 0x2D0 // 720
0x5a000430 : 0x11000895
1280x720@50:
0x5a000038 : 0x13F01
0x5a00003c : 0x500
0x5a000040 : 0
0x5a000044 : 0
0x5a000094 : 0x01
0x5a000048 : 0x3c
0x5a00004c : 0x149
0x5a000050 : 0xB90 // the only difference
0x5a000054 : 0x5
0x5a000058 : 0x14
0x5a00005c : 0x5
0x5a000060 : 0x2D0
0x5a000430 : 0x11000895
At the same time, we noticed that the timings of two official boards for two panels are set at 50fps.
file: panel-raydium-rm68200.c
static const struct drm_display_mode default_mode = {
.clock = 54000,
.hdisplay = 720,
.hsync_start = 720 + 48,
.hsync_end = 720 + 48 + 9,
.htotal = 720 + 48 + 9 + 48,
.vdisplay = 1280,
.vsync_start = 1280 + 12,
.vsync_end = 1280 + 12 + 5,
.vtotal = 1280 + 12 + 5 + 12,
.vrefresh = 50,
.flags = 0,
.width_mm = 68,
.height_mm = 122,
};
file: panel-orisetech-otm8009a.c
static const struct drm_display_mode default_mode = {
.clock = 33000,
.hdisplay = 480,
.hsync_start = 480 + 120,
.hsync_end = 480 + 120 + 64,
.htotal = 480 + 120 + 64 + 120,
.vdisplay = 800,
.vsync_start = 800 + 14,
.vsync_end = 800 + 14 + 14,
.vtotal = 800 + 14 + 14 + 14,
.vrefresh = 50,
.flags = 0,
.width_mm = 52,
.height_mm = 86,
};
So, I have two questions:
2019-09-30 02:53 AM
Hi,
ST boards use 50Hz instead of 60Hz only to save some internal bus bandwidth that, depending on use cases, could be better used by other applications/subsystems.
There is no limitation on using 60Hz.
Switching between 50Hz and 60Hz requires changing several settings to fit the timings with the spec of the specific display. Additional fine tuning could be required, again depending on the display.
Changing only the total size of horizontal line (reg DSI_VLCR 0x5a000050) should not be enough.
2019-10-08 04:16 AM
I set the timings according to drm_edid.c in drivers/gpu/drm/drm_edid.c as follows:
682 /* 4 - 1280x720@60Hz */
683 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
684 ┊ 1430, 1650, 0, 720, 725, 730, 750, 0,
685 ┊ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
686 ┊ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
======================================================================
764 /* 19 - 1280x720@50Hz */
765 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
766 ┊ 1760, 1980, 0, 720, 725, 730, 750, 0,
767 ┊ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
768 ┊ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
=====================================================================
60Hz: (HFP=1390-1280=110, HBP=1650-1430=220, HSYNC=1430-1390=40)
50Hz: (HFP=1720-1280=440, HBP=1980-1760=220, HSYNC=1760-1720=40)
As you can see, the only difference between 50Hz and 60Hz is the value of HFP. So, the only difference for DSI regs is in DSI_VLCR 0x5a000050, and that's my initial question.
2019-10-10 08:59 PM
Dear Team,
Do you have any suggestions about this issue?
Currently, we use the LT8912B to convert MIPI DSI to HDMI, but it does not work well with the flickering issue,and do you have any better successful solutions about MIPI DSI to HDMI on STM32MP157A?
2019-10-12 12:13 AM
Dear Team,
Currently, we make a progress on mipi dsi display. It does not flicker at 1280x720@60Hz in test pattern mode any more, the pictures are shown below:
Test pattern with horizontal color bar by command devmem2 0x5a000038 w 0x1013f01Test pattern with vertical color bar by command devmem2 0x5a000038 w 0x13f01
But when I disable test pattern by command “devmem2 0x5a000038 w 0x3f01�?, it flicks again. What is the reason for that, do you have some suggestion on this issue?