FAQs
cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Search instead for 
Did you mean: 

lan9303 switch device tree stm32mp1

Go to solution
MWoło.2
Senior II

‎2021-11-15 02:49 PM

Hi

I try to implement lan9303 switch with stm32mp1.

My current achievement is working only one channel

My working dts is

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";
	phy-mode = "rmii";
	max-speed = <100>;
	phy-handle = <&switch>;
	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";
	st,eth-ref-clk-sel;
	clock-names = "stmmaceth",
		"eth-ck",
		"mac-clk-tx",
		"mac-clk-rx",
		"ethstp";
	clocks = <&rcc ETHMAC>,
		<&rcc ETHCK_K>,
		<&rcc ETHTX>,
		<&rcc ETHRX>,
		<&rcc ETHSTP>;
 
	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		switch: switch-phy@0 {
			compatible = "ethernet-phy-id0007.C0D1","ethernet-phy-ieee802.3-c22";
			/*compatible = "smsc,lan9303-mdio";*/
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
			reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
			reset-duration = <100>;
			interrupt-parent = <&gpiog>;
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
			ports {
					#address-cells = <1>;
					#size-cells = <0>;
 
					port@0 {
						reg = <0>;
						label = "cpu";
						ethernet = <&ethernet0>;
					};
 
					port@1 { /* external port 1 */
						reg = <1>;
						label = "lan1";
					};
 
					port@2 { /* external port 2 */
						reg = <2>;
						label = "lan2";
					};
				};
		};
	};
};

but works only one channel

log

[  0.000000] psci: probing for conduit method from DT.

[  1.521077] usbcore: registered new interface driver cdc_ether

[  2.821806] stm32-dwmac 5800a000.ethernet: IRQ eth_lpi not found

[  2.826787] stm32-dwmac 5800a000.ethernet: PTP uses main clock

[  2.832343] stm32-dwmac 5800a000.ethernet: no reset control found

[  2.839174] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42

[  2.845637] stm32-dwmac 5800a000.ethernet:  DWMAC4/5

[  2.850598] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported

[  2.858071] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported

[  2.865439] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported

[  2.872380] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported

[  2.878880] stm32-dwmac 5800a000.ethernet: TSO supported

[  2.884145] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer

[  2.892063] stm32-dwmac 5800a000.ethernet: device MAC address 26:b3:aa:be:d2:74

[  2.899487] stm32-dwmac 5800a000.ethernet: Enabled Flow TC (entries=2)

[  2.906093] stm32-dwmac 5800a000.ethernet: TSO feature enabled

[  2.911986] stm32-dwmac 5800a000.ethernet: Using 32 bits DMA width

[  51.455894] using random self ethernet address

[  51.458948] using random host ethernet address

[  51.974713] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:00] driver [SMSC LAN911x Internal PHY] (irq=52)

[  52.037633] stm32-dwmac 5800a000.ethernet eth0: No Safety Features support found

[  52.070669] stm32-dwmac 5800a000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported

[  52.093902] stm32-dwmac 5800a000.ethernet eth0: registered PTP clock

[  52.118405] stm32-dwmac 5800a000.ethernet eth0: configuring for phy/rmii link mode

[  52.161436] stm32-dwmac 5800a000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx

[  52.212295] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

when I change to

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";
	phy-mode = "rmii";
	max-speed = <100>;
	phy-handle = <&switch>;
	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";
	st,eth-ref-clk-sel;
	clock-names = "stmmaceth",
		"eth-ck",
		"mac-clk-tx",
		"mac-clk-rx",
		"ethstp";
	clocks = <&rcc ETHMAC>,
		<&rcc ETHCK_K>,
		<&rcc ETHTX>,
		<&rcc ETHRX>,
		<&rcc ETHSTP>;
 
	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		switch: switch-phy@0 {
			/*compatible = "ethernet-phy-id0007.C0D1","ethernet-phy-ieee802.3-c22";*/
			compatible = "smsc,lan9303-mdio";
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
			reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
			reset-duration = <100>;
			interrupt-parent = <&gpiog>;
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
			ports {
					#address-cells = <1>;
					#size-cells = <0>;
 
					port@0 {
						reg = <0>;
						label = "cpu";
						ethernet = <&ethernet0>;
					};
 
					port@1 { /* external port 1 */
						reg = <1>;
						label = "lan1";
					};
 
					port@2 { /* external port 2 */
						reg = <2>;
						label = "lan2";
					};
				};
		};
	};
};

I have a result

[  2.920866] libphy: stmmac: probed

[  3.046999] LAN9303_MDIO stmmac-0:00: Found LAN9303 rev. 1

[  3.426832] LAN9303_MDIO stmmac-0:00: Found LAN9303 rev. 1

[  3.465957] LAN9303_MDIO stmmac-0:00: Using legacy PHYLIB callbacks. Please migrate to PHYLINK!

[  3.475721] LAN9303_MDIO stmmac-0:00 lan1 (uninitialized): PHY [dsa-0.0:01] driver [SMSC LAN911x Internal PHY] (irq=POLL)

[  3.487748] LAN9303_MDIO stmmac-0:00 lan2 (uninitialized): PHY [dsa-0.0:02] driver [SMSC LAN911x Internal PHY] (irq=POLL)

[  3.500408] LAN9303_MDIO stmmac-0:00: LAN9303 MDIO driver loaded successfully

[  69.119209] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Cannot attach to PHY (error: -19)

What I do wrong?

Labels:
0 Kudos
1 ACCEPTED SOLUTION

Accepted Solutions
Go to solution
MWoło.2
Senior II

‎2021-11-22 11:34 AM

DSA switch works. For my purpose, I don't need to add a LAN9303 driver. Just LAN911x is sufficient enough. Finally, I understand that this switch works like a daisy chain connection. The conclusion is 

&ethernet0{
 
	pinctrl-names = "default", "sleep";
 
	pinctrl-0 = <&eth1_pins_mx>;
 
	pinctrl-1 = <&eth1_sleep_pins_mx>;
 
	status = "okay";
 
	phy-mode = "rmii";
 
	max-speed = <100>;
 
	phy-handle = <&phy0>;
 
	st,eth-ref-clk-sel;
 
	clock-names = "stmmaceth",
 
		"eth-ck",
 
		"mac-clk-tx",
 
		"mac-clk-rx",
 
		"ethstp";
 
	clocks = <&rcc ETHMAC>,
 
		<&rcc ETHCK_K>,
 
		<&rcc ETHTX>,
 
		<&rcc ETHRX>,
 
		<&rcc ETHSTP>;
 
 
 
	mdio0 {
 
		compatible = "snps,dwmac-mdio";
 
		#address-cells = <1>;
 
		#size-cells = <0>;
 
		phy0: phy@0{
 
			compatible = "ethernet-phy-id0007.C0D1";
 
			reg = <0>;
 
			reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;	
 
			interrupt-parent = <&gpiog>;
 
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
 
			reset-delay-us = <10000>;
 
			post-reset-delay-us = <1000>;
 
			clocks = <&rcc ETHCK_K>;
 
			clock-names = "rmii-ref";
 
		};
 
	};
 
};

In rootfs, I just see eth0, which works in DHCP mode. The first LAN I connect to the router and the others to a laptop, for instance. So I'm able to address the board from any devices in the system. Don't connect both LAN1 and LAN2 to the same router.

The part

switch: switch@0 {
			compatible = "smsc,lan9303-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			dsa,member = <0 0>;
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					label = "cpu";
					ethernet = <&ethernet0>;
				};
				port@1 { /* external port 1 */
					reg = <1>;
					label = "lan1";
				};
				port@2 { /* external port 2 */
					reg = <2>;
					label = "lan2";
				};
			};
		};

It is only needed when you want to filter some packets, make some bridges etc.

That is all. I think this thread/topic can be closed.

Thanks a lot

BR Michal

View solution in original post

0 Kudos
8 REPLIES 8
Go to solution
OlivierK
ST Employee

‎2021-11-16 06:55 AM

Hi MWoło.2 (Community Member) 

What about the configuration mentioned in this post, it seems both LAN ports are detected using the LAN9303

&mdio0 {

reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;

reset-delay-us = <10000>;

post-reset-delay-us = <1000>;

 

phy0: ethernet-phy@0 {

compatible = "ethernet-phy-id0022.1622";

reg = <0>;

};

};

The lan9303 acts as a switch and I am able to use both LAN-Ports .

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-16 09:17 AM

Hi Olivier

I modified DTS to look as follow

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";
	phy-mode = "rmii";
	max-speed = <100>;
	phy-handle = <&phy0>;
	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";
	st,eth-ref-clk-sel;
	clock-names = "stmmaceth",
		"eth-ck",
		"mac-clk-tx",
		"mac-clk-rx",
		"ethstp";
	clocks = <&rcc ETHMAC>,
		<&rcc ETHCK_K>,
		<&rcc ETHTX>,
		<&rcc ETHRX>,
		<&rcc ETHSTP>;
 
	mdio0{
				reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
				reset-delay-us = <10000>;
				post-reset-delay-us = <1000>;
				interrupt-parent = <&gpioe>;
				interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
				compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-id0022.1622";
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
		};
	};
};

and from boot I received

[  0.000000] psci: probing for conduit method from DT.

[  1.546962] usbcore: registered new interface driver cdc_ether

[  2.848821] stm32-dwmac 5800a000.ethernet: IRQ eth_lpi not found

[  2.853664] stm32-dwmac 5800a000.ethernet: PTP uses main clock

[  2.859410] stm32-dwmac 5800a000.ethernet: no reset control found

[  2.866064] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42

[  2.872497] stm32-dwmac 5800a000.ethernet:  DWMAC4/5

[  2.877586] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported

[  2.884917] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported

[  2.892257] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported

[  2.899222] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported

[  2.905688] stm32-dwmac 5800a000.ethernet: TSO supported

[  2.910885] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer

[  2.918842] stm32-dwmac 5800a000.ethernet: device MAC address 1e:a7:57:ce:60:73

[  2.926205] stm32-dwmac 5800a000.ethernet: Enabled Flow TC (entries=2)

[  2.932763] stm32-dwmac 5800a000.ethernet: TSO feature enabled

[  2.938678] stm32-dwmac 5800a000.ethernet: Using 32 bits DMA width

[  68.650078] using random self ethernet address

[  68.653125] using random host ethernet address

[  69.278738] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)

[  69.337810] stm32-dwmac 5800a000.ethernet eth0: No Safety Features support found

[  69.353465] stm32-dwmac 5800a000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported

[  69.374392] stm32-dwmac 5800a000.ethernet eth0: registered PTP clock

[  69.382796] stm32-dwmac 5800a000.ethernet eth0: configuring for phy/rmii link mode

[  69.409864] 8021q: adding VLAN 0 to HW filter on device eth0

[  69.409907] stm32-dwmac 5800a000.ethernet eth0: Adding VLAN ID 0 is not supported

Chip was identified as KSZ9031 according to 

compatible = "ethernet-phy-id0022.1622";

and of course not working.

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-16 10:51 AM

I also installed net-tools

and typing

mii-tool -vv eth0

I receive something

0693W00000GXnQDQA1.pngSo I'm not able to read PHY ID.

From the documentation, I read that ID is 0007.C0D1. This ID is identical to LAN911x.

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-16 01:36 PM

I have a strange feeling that I configured everything good and a problem is related to configuration DSA(switch) into systemd.

My current boot log looks

[  0.000000] psci: probing for conduit method from DT.

[  1.519995] usbcore: registered new interface driver cdc_ether

[  2.824784] stm32-dwmac 5800a000.ethernet: IRQ eth_lpi not found

[  2.829640] stm32-dwmac 5800a000.ethernet: PTP uses main clock

[  2.835410] stm32-dwmac 5800a000.ethernet: no reset control found

[  2.842036] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42

[  2.848625] stm32-dwmac 5800a000.ethernet:  DWMAC4/5

[  2.853614] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported

[  2.860968] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported

[  2.868399] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported

[  2.875361] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported

[  2.881819] stm32-dwmac 5800a000.ethernet: TSO supported

[  2.887104] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer

[  2.895042] stm32-dwmac 5800a000.ethernet: device MAC address a2:6d:9e:38:f7:a6

[  2.902415] stm32-dwmac 5800a000.ethernet: Enabled Flow TC (entries=2)

[  2.909062] stm32-dwmac 5800a000.ethernet: TSO feature enabled

[  2.914958] stm32-dwmac 5800a000.ethernet: Using 32 bits DMA width

[  51.958489] using random self ethernet address

[  51.961564] using random host ethernet address

[  53.374605] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:01] driver [SMSC LAN8710/LAN8720] (irq=52)

[  53.437576] stm32-dwmac 5800a000.ethernet eth0: No Safety Features support found

[  53.485457] stm32-dwmac 5800a000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported

[  53.500961] stm32-dwmac 5800a000.ethernet eth0: registered PTP clock

[  53.547373] stm32-dwmac 5800a000.ethernet eth0: configuring for phy/rmii link mode

[  53.584953] 8021q: adding VLAN 0 to HW filter on device eth0

[  53.600653] stm32-dwmac 5800a000.ethernet eth0: Adding VLAN ID 0 is not supported

The eth0 is combined somehow with VLAN. Unfortunately, I haven't enough knowledge of how to do this.

Can someone give me some links to, manual on how to do this in systems, not in busybox.

Thanks

0 Kudos
Go to solution
OlivierK
ST Employee

‎2021-11-19 08:36 AM

Hi MWoło.2 (Community Member)

Just one remark. Is it specific to the LAN9303 to redefine in the mdio node:

clocks = <&rcc ETHCK_K>;

clock-names = "rmii-ref";

Rgds,

Olivier

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-19 02:44 PM

Hi Olivier,

my current DTS looks like following

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";
	phy-mode = "rmii";
	max-speed = <100>;
	phy-handle = <&phy0>;
	st,eth-ref-clk-sel;
	clock-names = "stmmaceth",
		"eth-ck",
		"mac-clk-tx",
		"mac-clk-rx",
		"ethstp";
	clocks = <&rcc ETHMAC>,
		<&rcc ETHCK_K>,
		<&rcc ETHTX>,
		<&rcc ETHRX>,
		<&rcc ETHSTP>;
 
	mdio0 {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;
		phy0: phy@1{
			compatible = "ethernet-phy-id0007.C0D1", "ethernet-phy-ieee802.3-ac";
			reg = <1>;
			reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;	
			interrupt-parent = <&gpiog>;
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
			reset-delay-us = <10000>;
			post-reset-delay-us = <1000>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
		};
		switch: switch@0 {
			compatible = "smsc,lan9303-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			dsa,member = <0 0>;
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					label = "cpu";
					ethernet = <&ethernet0>;
				};
				port@1 { /* external port 1 */
					reg = <1>;
					label = "lan1";
				};
				port@2 { /* external port 2 */
					reg = <2>;
					label = "lan2";
				};
			};
		};
	};
};

my log is

[  2.969615] libphy: stmmac: probed

[  2.984053] LAN9303_MDIO stmmac-0:00: Found LAN9303 rev. 1

[  3.249640] LAN9303_MDIO stmmac-0:00: Found LAN9303 rev. 1

[  3.321255] LAN9303_MDIO stmmac-0:00: Using legacy PHYLIB callbacks. Please migrate to PHYLINK!

[  3.340418] LAN9303_MDIO stmmac-0:00 lan1 (uninitialized): PHY [dsa-0.0:01] driver [SMSC LAN911x Internal PHY] (irq=POLL)

[  3.354287] LAN9303_MDIO stmmac-0:00 lan2 (uninitialized): PHY [dsa-0.0:02] driver [SMSC LAN911x Internal PHY] (irq=POLL)

[  3.367043] LAN9303_MDIO stmmac-0:00: LAN9303 MDIO driver loaded successfully

[  54.013139] stm32-dwmac 5800a000.ethernet eth0: PHY [stmmac-0:01] driver [SMSC LAN911x Internal PHY] (irq=52)

[  56.055846] LAN9303_MDIO stmmac-0:00 lan1: configuring for phy/gmii link mode

[  56.374405] LAN9303_MDIO stmmac-0:00 lan2: configuring for phy/gmii link mode

[ 100.075252] LAN9303_MDIO stmmac-0:00 lan2: Link is Up - 100Mbps/Full - flow control rx/tx

[ 134.085231] LAN9303_MDIO stmmac-0:00 lan1: Link is Up - 100Mbps/Full - flow control rx/tx

[ 168.715032] LAN9303_MDIO stmmac-0:00 lan2: Link is Down

[ 169.435065] LAN9303_MDIO stmmac-0:00 lan1: Link is Down

and everything seems to be work but I have a problem with VLAN filtering

[  54.130459] 8021q: adding VLAN 0 to HW filter on device eth0

[  54.130514] stm32-dwmac 5800a000.ethernet eth0: Adding VLAN ID 0 is not supported

[ 100.075252] LAN9303_MDIO stmmac-0:00 lan2: Link is Up - 100Mbps/Full - flow control rx/tx

[ 100.082137] IPv6: ADDRCONF(NETDEV_CHANGE): lan2: link becomes ready

[ 134.085231] LAN9303_MDIO stmmac-0:00 lan1: Link is Up - 100Mbps/Full - flow control rx/tx

[ 134.092101] IPv6: ADDRCONF(NETDEV_CHANGE): lan1: link becomes ready

[ 145.520560] stm32-dwmac 5800a000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx

[ 145.528055] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

[ 147.737539] net eth0: Dropping packet due to invalid VLAN marker

[ 147.742227] net eth0: Dropping packet due to invalid VLAN marker

[ 147.754183] net eth0: Dropping packet due to invalid VLAN marker

[ 147.758863] net eth0: Dropping packet due to invalid VLAN marker

[ 150.928970] net eth0: Dropping packet due to invalid VLAN marker

[ 150.933682] net eth0: Dropping packet due to invalid VLAN marker

[ 150.939763] net eth0: Dropping packet due to invalid VLAN marker

[ 150.945837] net eth0: Dropping packet due to invalid VLAN marker

[ 151.102514] net eth0: Dropping packet due to invalid VLAN marker

[ 151.107207] net eth0: Dropping packet due to invalid VLAN marker

[ 152.765556] lan9303_rcv: 6 callbacks suppressed

[ 152.768763] net eth0: Dropping packet due to invalid VLAN marker

[ 152.774845] net eth0: Dropping packet due to invalid VLAN marker

[ 152.781109] net eth0: Dropping packet due to invalid VLAN marker

[ 152.787024] net eth0: Dropping packet due to invalid VLAN marker

[ 152.793150] net eth0: Dropping packet due to invalid VLAN marker

[ 152.799229] net eth0: Dropping packet due to invalid VLAN marker

[ 153.417139] net eth0: Dropping packet due to invalid VLAN marker

[ 153.421823] net eth0: Dropping packet due to invalid VLAN marker

[ 153.432334] net eth0: Dropping packet due to invalid VLAN marker

[ 153.437043] net eth0: Dropping packet due to invalid VLAN marker

[ 161.525183] lan9303_rcv: 8 callbacks suppressed

[ 161.528379] net eth0: Dropping packet due to invalid VLAN marker

[ 161.534468] net eth0: Dropping packet due to invalid VLAN marker

[ 161.540766] net eth0: Dropping packet due to invalid VLAN marker

[ 161.546639] net eth0: Dropping packet due to invalid VLAN marker

[ 161.552685] net eth0: Dropping packet due to invalid VLAN marker

[ 161.558848] net eth0: Dropping packet due to invalid VLAN marker

[ 161.564941] net eth0: Dropping packet due to invalid VLAN marker

[ 161.570962] net eth0: Dropping packet due to invalid VLAN marker

[ 164.017030] net eth0: Dropping packet due to invalid VLAN marker

[ 164.021672] net eth0: Dropping packet due to invalid VLAN marker

[ 168.715032] LAN9303_MDIO stmmac-0:00 lan2: Link is Down

[ 169.027536] lan9303_rcv: 6 callbacks suppressed

[ 169.030707] net eth0: Dropping packet due to invalid VLAN marker

[ 169.040067] net eth0: Dropping packet due to invalid VLAN marker

[ 169.435065] LAN9303_MDIO stmmac-0:00 lan1: Link is Down

[ 175.675825] stm32-dwmac 5800a000.ethernet eth0: Link is Down

Unfortunately, I have no idea what this VLAN means. I read that LAN9303 do not support filtering but how to disable or work around this. guess that for this reason, I have not received an IP address.

Ref.

https://01.org/linuxgraphics/gfx-docs/drm/networking/dsa/lan9303.html

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-20 07:46 AM

VLAN warning removed by disabled options in the Kernel.

0 Kudos
Go to solution
MWoło.2
Senior II

‎2021-11-22 11:34 AM

DSA switch works. For my purpose, I don't need to add a LAN9303 driver. Just LAN911x is sufficient enough. Finally, I understand that this switch works like a daisy chain connection. The conclusion is 

&ethernet0{
 
	pinctrl-names = "default", "sleep";
 
	pinctrl-0 = <&eth1_pins_mx>;
 
	pinctrl-1 = <&eth1_sleep_pins_mx>;
 
	status = "okay";
 
	phy-mode = "rmii";
 
	max-speed = <100>;
 
	phy-handle = <&phy0>;
 
	st,eth-ref-clk-sel;
 
	clock-names = "stmmaceth",
 
		"eth-ck",
 
		"mac-clk-tx",
 
		"mac-clk-rx",
 
		"ethstp";
 
	clocks = <&rcc ETHMAC>,
 
		<&rcc ETHCK_K>,
 
		<&rcc ETHTX>,
 
		<&rcc ETHRX>,
 
		<&rcc ETHSTP>;
 
 
 
	mdio0 {
 
		compatible = "snps,dwmac-mdio";
 
		#address-cells = <1>;
 
		#size-cells = <0>;
 
		phy0: phy@0{
 
			compatible = "ethernet-phy-id0007.C0D1";
 
			reg = <0>;
 
			reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;	
 
			interrupt-parent = <&gpiog>;
 
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
 
			reset-delay-us = <10000>;
 
			post-reset-delay-us = <1000>;
 
			clocks = <&rcc ETHCK_K>;
 
			clock-names = "rmii-ref";
 
		};
 
	};
 
};

In rootfs, I just see eth0, which works in DHCP mode. The first LAN I connect to the router and the others to a laptop, for instance. So I'm able to address the board from any devices in the system. Don't connect both LAN1 and LAN2 to the same router.

The part

switch: switch@0 {
			compatible = "smsc,lan9303-mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			dsa,member = <0 0>;
			reg = <0>;
			clocks = <&rcc ETHCK_K>;
			clock-names = "rmii-ref";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					label = "cpu";
					ethernet = <&ethernet0>;
				};
				port@1 { /* external port 1 */
					reg = <1>;
					label = "lan1";
				};
				port@2 { /* external port 2 */
					reg = <2>;
					label = "lan2";
				};
			};
		};

It is only needed when you want to filter some packets, make some bridges etc.

That is all. I think this thread/topic can be closed.

Thanks a lot

BR Michal

0 Kudos
Top