2021-07-19 07:09 PM
Hello Guys
Like the subject, I want change the interface RGMII to RMII using CubeMX.
(RealTek-RTL8211EG-VB-CG => Microchip - LAN8720AI-CP)
Based on STM32MP157C-EV1 Code in CubeMX, I changed the Ethernet option from RGMII to RMII as shown in the picture below.
And after Code Generating, I applied it to my addon(mx) directory and built it.
(Changed to the code generated by CubeMX.)
eth1_pins_mx: eth1_mx-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 1, AF11)>, /* ETH1_REF_CLK */
<STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
<STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
<STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
<STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
<STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
bias-disable;
};
pins4 {
pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
};
};
eth1_sleep_pins_mx: eth1_sleep_mx-0 {
pins {
pinmux = <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_REF_CLK */
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
<STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
<STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
<STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
};
};
ðernet0{
pinctrl-names = "default", "sleep";
pinctrl-0 = <ð1_pins_mx>;
pinctrl-1 = <ð1_sleep_pins_mx>;
status = "okay";
/* USER CODE BEGIN ethernet0 */
phy-mode = "rgmii-id";
/*phy-mode = "rmii";*/
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0{
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0:ethernet-phy@0{
reg = <0>;
};
};
/* USER CODE END ethernet0 */
};
However, it seems that the ethernet chip is not recognized as shown in the log below.
~# dmesg | grep eth
[ 0.000000] psci: probing for conduit method from DT.
[ 1.236408] usbcore: registered new interface driver cdc_ether
[ 2.756520] stm32-dwmac 5800a000.ethernet: PTP uses main clock
[ 2.760976] stm32-dwmac 5800a000.ethernet: no reset control found
[ 2.767028] stm32-dwmac 5800a000.ethernet: No phy clock provided...
[ 2.773905] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42
[ 2.780299] stm32-dwmac 5800a000.ethernet: DWMAC4/5
[ 2.785190] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported
[ 2.792527] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported
[ 2.799835] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported
[ 2.806696] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported
[ 2.812984] stm32-dwmac 5800a000.ethernet: TSO supported
[ 2.818278] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[ 2.826149] stm32-dwmac 5800a000.ethernet: device MAC address be:10:95:ec:a0:c7
[ 2.833449] stm32-dwmac 5800a000.ethernet: TSO feature enabled
[ 10.455282] stm32-dwmac 5800a000.ethernet eth0: no phy at addr -1
[ 10.475335] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Cannot attach to PHY (error: -19)
I have no experience changing ethernet ICs so I need your help.
If necessary, I can attach the ethernet circuit diagram of my board.
Thanks
Solved! Go to Solution.
2021-07-19 11:39 PM
Hi,
please have a look to AN5031 and https://wiki.st.com/stm32mpu/wiki/Ethernet_device_tree_configuration#DT_configuration_examples_at_board_level
Regards.
2021-07-19 11:39 PM
Hi,
please have a look to AN5031 and https://wiki.st.com/stm32mpu/wiki/Ethernet_device_tree_configuration#DT_configuration_examples_at_board_level
Regards.
2021-07-20 10:10 PM
Thank you for your answer.
In my case I think it's 3.3.1 from your link.
So I applied the line below to the dts file in my addons/mx/PROJECT/u-boot and kernel directory.
ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<&exti 70 1>;
interrupt-names = "macirq",
"eth_wake_irq",
"stm32_pwr_wakeup";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ethstp";
clock = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
<&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
snps,pbl = <2>;
snps,en-tx-lpi-clockgating;
snps,axi-config = <&stmmac_axi_config_0>;
snps,tso;
power-domains = <&pd_core>;
status = "disabled";
};
After that, an error occurs when bitbake. Do I need to apply it to a file other than the one in that location?
2021-07-21 12:02 AM
Hi,
I'm more HW oriented, so I cannot help much on SW aspects.
Have you carefully followed the steps in https://wiki.st.com/stm32mpu/wiki/How_to_compile_the_device_tree_with_the_Developer_Package ?
This could also help:
https://wiki.st.com/stm32mpu/wiki/How_to_create_your_board_device_tree
https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board
Regards
2021-08-04 11:32 PM
HI !
I solved that problem.
It was a HW problem, not a BSP problem.
But your answer helped me find my HW problem.
Thank you very much!