2025-06-23 8:47 AM - last edited on 2025-06-23 10:27 AM by Peter BENSCH
Hello,
I'm working on PTP synchronization using the STM32MP257F-DK development board, and I'm encountering an issue with generating a PPS output on a GPIO pin. I'm using Buildroot as the build system, configured with the Bootlin external tree available from : https://github.com/bootlin/buildroot-external-st/tree/st/2024.02.9?tab=readme-ov-file
I want the STM32MP257 board to operate as a PTP slave to an external grandmaster clock. To verify synchronization accuracy, I'm trying to observe the PPS output on the PF4 pin, which corresponds to ETH1_PPS_OUT according to the datasheet, using an oscilloscope.
Here are the steps I followed:
[global]
verbose 0
clientOnly 1
delay_mechanism E2E
network_transport L2
time_stamping hardware
clock_type OC
domainNumber 24
step_threshold 1.0
[eth0]
STM32_PINMUX('F', 4, AF11) /* ETH1_PPS_OUT */ .
I also verified that ptp_ref clock is correctly defined.
After building and running the system, I executed the following commands on the board's linux environment and got a working ptp synchronization:
ptp4l -i eth0 -f /etc/linuxptp.cfg
phc2sys -s eth0 -c CLOCK_REALTIME -O 0
However, when I run 'echo "0 0 0 1 0" > /sys/class/ptp/ptp0/period' , I do not get any visible PPS pulse on PF4 on the oscilloscope.
I repeated the exact same steps on an STM32MP157C-DK2 board, using a different pin (PG8), and the PPS output worked correctly, I was able to visualize a PPS signal.
Could the issue be software-related, maybe due to incomplete kernel support or misconfiguration in the STM32MP257 board? I’d be grateful to know if this is a known concern.
Thanks in advance,
Leen