cancel
Showing results for 
Search instead for 
Did you mean: 

STM32MP1 interrupt causes undefined exception in ARM mode (but works in thumb)

bsvi
Associate II

I modified an FSBL example to get to the root of the problem (everything else being as in the example).

 

 

 

volatile int rrr = 0;
void SGI0_IRQHandler(void) {
    while (1) {
        rrr++;
    };
}

int main()
{
  HAL_Init();
  SystemClock_Config();

  IRQ_Disable(SGI0_IRQn);

  IRQ_SetPriority(SGI0_IRQn, 0);
  IRQ_Enable(SGI0_IRQn);

  while(1) {
	  GIC_SendSGI(SGI0_IRQn, 1, 0);
  }
}

 

 

 

This works perfectly in thumb mode, but when I switch to ARM (that probably should give slight performance boost for my DSP task), the interrupt is stuck in Vectors section, without doing anything.

bsvi_0-1732116792961.png

The LR is weird, and I cant get my head around how is it possible that is has LR = 0x2ffe0106 (not multiple of 4)

bsvi_1-1732116911656.png

As if the core switched to thumb mode without address being odd and started executing instructions in 16 bit mode.

Thanks for any advice :)

1 ACCEPTED SOLUTION

Accepted Solutions
bsvi
Associate II

Found the cause, I it's actually a bug in ST's code. So, the reason is that all startup_stm32mp135fxx_ca7.c files unconditionally enable interrupt handling in thumb mode with this line:

"ORR R0, R0, #(0x1 << 30) \n" /* Set TE bit to take exceptions in Thumb mode */

While startup_stm32mp135fxx_ca7_azurertos.c do it depending on ARM_MODE define.

View solution in original post

3 REPLIES 3
Olivier GALLIEN
ST Employee

Hi @bsvi ,

Please confirm you are on baremetal MP13 solution on DK board here ?

Thanks 

Olivier 

Olivier GALLIEN
In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
PatrickF
ST Employee

Hi @bsvi 

you should refer to ARM documents to understand how interrupt are handled.

https://developer.arm.com/documentation/ddi0406/latest/

https://developer.arm.com/documentation/den0013/d/Exception-Handling/Exception-handling

 

Regards.

 

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.
bsvi
Associate II

Found the cause, I it's actually a bug in ST's code. So, the reason is that all startup_stm32mp135fxx_ca7.c files unconditionally enable interrupt handling in thumb mode with this line:

"ORR R0, R0, #(0x1 << 30) \n" /* Set TE bit to take exceptions in Thumb mode */

While startup_stm32mp135fxx_ca7_azurertos.c do it depending on ARM_MODE define.