2024-08-01 08:43 AM - edited 2024-08-01 08:51 AM
I made a custom board with the processor STM32MP151AAC3 and own firmwire https://github.com/DanielMartensson/STM32-Computer/tree/main/STM32CubeIDE/STM32-Computer-Firmware . I have compiled the TF-A by using STM32CubeIDE. It was some bugs with the TF-A configuration, but it seems I fixed them in this thread:
Solved: BUG: Label or path X_pins_y not found - Compiling ... - STMicroelectronics Community
PANIC at PC : 0x2ffec98b
Exception mode=0x00000016 at: 0x2ffec98b
I have tried to flash it with firmware of STM32MP157 with another I2C4 pin configuration. And it failed.
NOTICE: CPU: STM32MP151AAC Rev.Z
NOTICE: Model: STMicroelectronics STM32MP157A eval daughter on eval mother
ERROR: I2C device not ready
PANIC at PC : 0x2fff101b
Exception mode=0x00000016 at: 0x2fff101b
Trying the Flashout Delete All DK1 STM32MP157a.
Exception mode=0x00000016 at: 0x2fff101b
NOTICE: CPU: STM32MP151AAC Rev.Z
NOTICE: Model: STMicroelectronics STM32MP157A-DK1 Discovery Board
ERROR: I2C device not ready
PANIC at PC : 0x2fff101b
That means the following:
Question:
This new error must lead to an answer. What can it be?
Solved! Go to Solution.
2024-09-12 07:21 AM
@DMårt Thank you. I am trying to understand and solve the USB OTG issue :)
@@5c00a000 device is:
tamp: tamp@5c00a000 {
compatible = "st,stm32-tamp", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x5c00a000 0x400>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc RTCAPB>;
ranges;
st,backup-zones = <10 5 17>;
nvram: nvram@5c00a100 {
compatible = "st,stm32mp15-tamp-nvram";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x5c00a100 0x80>;
wakeup_sec: tamp-bkp@0 {
reg = <0x0 0x4>;
};
m4_security_perimeter_exti1: tamp-bkp@4 {
/* see cortex-m4 wake up feature */
reg = <0x4 0x4>;
};
m4_security_perimeter_exti2: tamp-bkp@8 {
/* see cortex-m4 wake up feature */
reg = <0x8 0x4>;
};
m4_security_perimeter_exti3: tamp-bkp@c {
/* see cortex-m4 wtake up feature */
reg = <0xc 0x4>;
};
magic_number: tamp-bkp@10 {
/* see ddr and cpu wake up management feature */
reg = <0x10 0x4>;
};
branch_address: tamp-bkp@14 {
/* see ddr and cpu wake up management feature */
reg = <0x14 0x4>;
};
fwu_info: tamp-bkp@28 {
/* see firmware update info feature */
reg = <0x28 0x4>;
};
copro_rsc_tbl_address: tamp-bkp@44 {
/* see cortex-m4 management feature */
reg = <0x44 0x4>;
};
cortex_m_state: tamp-bkp@48 {
/* see cortex-m4 management feature */
reg = <0x48 0x4>;
};
boot_mode: tamp-bkp@50 {
/* see boot mode selection feature */
reg = <0x50 0x4>;
};
boot_counter: tamp-bkp@54 {
/* see boot counter feature */
reg = <0x54 0x4>;
};
m4_wakeup_area_start: tamp-bkp@58 {
/* see cortex-m4 wake up feature */
reg = <0x58 0x4>;
};
m4_wakeup_area_length: tamp-bkp@5c {
/* see cortex-m4 wake up feature */
reg = <0x5c 0x4>;
};
m4_wakeup_area_hash: tamp-bkp@60 {
/* SHA-256 value see Cortex-M4 wake up feature */
reg = <0x60 0x20>;
};
};
reboot_mode: reboot-mode {
compatible = "nvmem-reboot-mode";
nvmem-cells = <&boot_mode>;
nvmem-cell-names = "reboot-mode";
mode-normal = <0x00>;
mode-fastboot = <0x01>;
mode-recovery = <0x02>;
mode-stm32cubeprogrammer = <0x03>;
mode-ums_mmc0 = <0x10>;
mode-ums_mmc1 = <0x11>;
mode-ums_mmc2 = <0x12>;
mode-romcode_serial = <0xff>;
};
};
2024-09-12 11:40 AM
Hmm...can you add these to optee?
Also check out the file "STM32MP15xx-dx.dtsi" in arch/arm/dts folder of optee/tf-a/kernel/u-boot. Very useful examples in there.
2024-09-12 11:50 AM
@DMårt I did it, and it changed nothing. Do you mean an arch/arm/dts/stm32mp15xx-dkx? dtsi file?
2024-09-12 11:57 AM
YEs. Follow that.
But I'm very sure that you got time out when you're connecting
Copy everything from me. Or else, it's a hardware issue.