on 2024-08-05 06:00 AM
There are two possible solutions for connecting two quad-SPI memories using only one OCTOSPI interface.
Use a dedicated bit in the OCTOSPI_CR register for external memory selection: MSEL bit for STM32H5, STM32U5, and STM32L5 series or FSEL bit for STM32H7 and STM32L4+ series: The idea is to select the external memory to be addressed in single-, dual-, quad-SPI mode in a single-memory configuration.
MSEL or FSEL bit configuration:
0: External memory 1 selected (data exchanged over IO[3:0])
1: External memory 2 selected (data exchanged over IO[7:4])
This MSEL/FSEL bit is ignored when DMM = 1 or when octal-SPI mode is selected.
Use a different chip select GPIO pins for each memory. The two memories must be connected to the same OCTOSPI instance. The chip select of each memory must be connected to an OCTOSPI chip select GPIO pin as shown in the below figure.
The software should configure the chip to select the GPIO pin for the memory to be accessed by driving the GPIO configuration. For example, when transmitting data to quad-SPI memory1, it is recommended to set the quad-SPI memory2 chip select pin (Pin2) to high voltage by using a pull-up resistor. In this case, the GPIO Pin2 is configured as GPIO output "Pull-up" and the Pin1 is configured as an alternate function.
Is it possible to use memory-mapped mode in both solution on STM32U5?
Hello @lenonrteng and welcome to the Community ;
Yes, you can use “memory-mapped” mode for both solutions on STM32U5.
Thank you for your contribution in STCommunity.
Kaouthar