X-NUCLEO-GFX01M2 SPI frequency

[sacha-usmb]

Hello,

I am currently using a X-NUCLEO-GFX01M2 screen to display logs from a NUCLEO-STM32WL55JC board. Unfortunately, it is quite slow to display the logs, so I wanted to improve the SPI frequency. I tested it by lowering the SPI BaudRatePrescaler from the nucleo board, but below 16, I noticed no improvements. When measuring the SPI clock, there is no improvement above roughly 3 MHz.

How can I improve the SPI link?

Moreover, there is nothing related to the max SPI frequency in any X-NUCLEO-GFX01M2 documentation. What is the max frequency the GFX01M2 screen can support?

Regards,

Sacha

[Andrew Neil]

Surely, if increasing the SPI speed makes no difference, that suggests that the SPI is not the bottleneck?

What optimisation level are you using?

Are you using DMA?

[TDK]

The max SPI speed will depend on the controller. Different versions of the board have different controllers. Refer to the board documentation to find out which controller you have, and refer to that for timing information.

[sacha-usmb]

You are probably right that SPI is not the bottleneck.

I am using -O0 optimization. I tried higher optimization levels and the result was much better (almost twice better with -O3)!

I don't use DMA but polling.

[Andrew Neil · Accepted solution]

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@sacha-usmb wrote:

I tried higher optimization levels and the result was much better (almost twice better with -O3)!

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So the software is the bottleneck!

Are you using HAL?

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@sacha-usmb wrote:

I don't use DMA but polling.

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If you need further improvement, look into DMA...

[sacha-usmb]

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@Andrew Neil wrote:

Are you using HAL?

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Yes I am. I'll check DMA to see if it's worth it.

[sacha-usmb]

The board used is MB1642-TCXD022IB5-D01, but I did not manage yet to find the documentation and, hence, the controller for timing information. I'll keep searching.

[Andrew Neil]

You said polling - does that mean you're not even using interrupts?

Even then, HAL's SPI is quite clunky - if you look with a scope, you will see significant gaps between bytes on the bus.

There is definitely scope to manually optimise here!

DMA should also help.

After all that, you then might see improvements from raising the SPI speed...

[sacha-usmb]

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@Andrew Neil wrote:

You said polling - does that mean you're not even using interrupts?

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Good question, I don't really know. I'am using the st7789 library which only calls HAL SPI functions, like HAL_SPI_Transmit() and HAL_SPI_Transmit_DMA() if I want to use DMA.

[Andrew Neil]

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HAL_SPI_Transmit()  is blocking;  HAL_SPI_Transmit_IT() is the interrupt-driven one:

https://www.st.com/resource/en/user_manual/um2642-description-of-stm32wl-hal-and-lowlayer-drivers-stmicroelectronics.pdf#page=674 

https://www.st.com/resource/en/user_manual/um2642-description-of-stm32wl-hal-and-lowlayer-drivers-stmicroelectronics.pdf#page=675