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STM32WBx5: available Flash and SRAM when using BLE

connoisseur_de_mimi
Associate II

I am developing an application based on a STM32WB35CE and have noticed that the code generated by STM32CubeMX limits available Flash to 256k and available SRAM to 32k (the WB35CE has 512k and 96k, respectively). I have flashed the stm32wb3x_BLE_Stack_full_fw.bin copro binary, so not having all memory available is expected.

according to AN5451 I should have 363k of Flash and 57k of SRAM (across the 3 SRAM banks) available for my application. How can I use these?

1 ACCEPTED SOLUTION

Accepted Solutions
connoisseur_de_mimi
Associate II

I think I got it.

I specified an additional memory area for the 15K that should be free in SRAM Bank 2b (if the info in AN5185:1.5 and AN5451:4.2 is correct)

 

 

/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x5A000 /* 256K */
RAM (xrw) : ORIGIN = 0x20000008, LENGTH = 0x7FF8 /* 32K */
RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
RAM_2B (xrw) : ORIGIN = 0x20038000, LENGTH = 0x3C00 /* 15K, public area of SRAM_2B AN5185:1.5 AN5451:4.2*/
}

 

and added a section:

 

  .sram2b : 
  {
    . = ALIGN(4);
    _ssram2b = .;
    
    _esram2b = .;
  } > RAM_2B	/* public space of SRAM2B */

 

 

to place variables in the section I use attributes:

 

__attribute__ ((section(".sram2b"))) Foo foo();

 

View solution in original post

5 REPLIES 5
connoisseur_de_mimi
Associate II

The STM32WB Corpo Wireless Binaries Release Notes contain info on how to set up the correct flash size. Secure Flash Start Address is (in my case) 0x0805a000,  so usable flash size is 0x5A000 (360k) which I have entered in the linker script:

 

 

 

/* Specify the memory areas */
MEMORY
{
FLASH (rx)                 : ORIGIN = 0x08000000, LENGTH = 0x5A000 
RAM (xrw)                 : ORIGIN = 0x20000008, LENGTH = 0x7FF8
RAM_SHARED (xrw)           : ORIGIN = 0x20030000, LENGTH = 10K
}

 

 

this seems to work so far, but I have not yet found out how to do the same for SRAM.

Hello @connoisseur_de_mimi 

Everything on the SRAM and Flash available depend on the configuration and implementation. You may try to test this configuration on your implementation and find out if it works or not. On our Side, we guarantee it will work on the Configuration generated using CubeMX. For other Configurations, we can't guarantee any behavior.

Best Regards.

STTwo-32

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hi,

did you mean to attach a config for me to try?

Try to implement the SRAM and Flash that you are assuming that it is available.

Best Regards.

STTwo-32

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

connoisseur_de_mimi
Associate II

I think I got it.

I specified an additional memory area for the 15K that should be free in SRAM Bank 2b (if the info in AN5185:1.5 and AN5451:4.2 is correct)

 

 

/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x5A000 /* 256K */
RAM (xrw) : ORIGIN = 0x20000008, LENGTH = 0x7FF8 /* 32K */
RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
RAM_2B (xrw) : ORIGIN = 0x20038000, LENGTH = 0x3C00 /* 15K, public area of SRAM_2B AN5185:1.5 AN5451:4.2*/
}

 

and added a section:

 

  .sram2b : 
  {
    . = ALIGN(4);
    _ssram2b = .;
    
    _esram2b = .;
  } > RAM_2B	/* public space of SRAM2B */

 

 

to place variables in the section I use attributes:

 

__attribute__ ((section(".sram2b"))) Foo foo();