STM32WB IPCC

[DS.4]

Hi all

Maybe you can help me understand something about the IPCC.

From my understanding: In case CPU2(BlackBox) sends the CPU1 an command:

CPU2(BLE) -----RX occupied ISR -----> CPU1(APP), look in Queue to get the user event.

: CPU1(APP) --------TX free ISR---------> CPU2(BLE) , where is the data??

When CPU1 (APP) gets a user event from CPU2, It sends a response to CPU2 in a form of TX free ISR is sent. Where is the data of that event?

Thanks.

P.s. I see that in the opposite direction the data is stored in pCmdBuffer

[Remi QUINTIN]

The wireless stack on CPU2 never sends a command to CPU1.

It is the other way. The application running on CPU1 sends a command to CPU2 via IPCC and CPU2 returns data received from the network or answers to previous commands from the application.

Buffers used for inter-processor communication are located in SRAM2.

Attached is a basic description of IPCC.

[DS.4]

Thanks,

I see that in code there are 2 ISRs for messages. Both the Async user evet and the RespCmd evnt? What is the difference?

Regarding traces, it is not possible to use the Traces Channel?

I am wondering if there is extra value in creating the channel.

Thanks.

[Remi QUINTIN · Accepted solution]

There is no BLE trace sent over IPCC. Only Thread protocol stack (and possibly Zigbee protocol) is sending traces IPCC to the M4 core.