2020-07-21 03:42 PM
I have been trying to get the stm32wb nucleo working with the st7789 lcd but have only observed strange behavior. I have successfully gotten it to work with the stm32f103c8t6 using the code found here. When CPOL=0 on the stm32f103 the screen does not work but on the stm32wb when CPOL=0 the screen will initiate and commands can be sent to it successfully. However when I try to send a frame nothing happens. I have also checked that the DC pin is working as it should. I am confused by the strange behavior observed when CPOL=0, other than that, this is the only thing I have observed when using the stm32wb.
This is the only code changed between the two projects:
Original GPIOInit code (stm32f103):
void st7789_GPIOInit(void) {
// Enable GPIOA and SPI1 clock
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_SPI1EN;
// Enable DMA1 channel
//RCC->AHBENR |= RCC_AHBENR_DMA1EN;
// Enable SPI
ST7789_SPI->SR = 0;
// Reverse polarity?
ST7789_SPI->CR1 = \
SPI_CR1_SSM | \
SPI_CR1_SSI | \
SPI_CR1_MSTR | \
SPI_CR1_CPOL | \
SPI_CR1_BIDIMODE | \
SPI_CR1_BIDIOE;
ST7789_SPI->CR1 |= SPI_CR1_SPE;
// DC and RST signals
// Maximum output speed
ST7789_DC_PORT->CRH |= GPIO_CRH_MODE8;
ST7789_RST_PORT->CRH |= GPIO_CRH_MODE9;
// Output push pull
ST7789_DC_PORT->CRH &= ~(GPIO_CRH_CNF8);
ST7789_RST_PORT->CRH &= ~(GPIO_CRH_CNF9);
// SPI pins
// Maximum output speed on PA5/PA7
GPIOA->CRL |= GPIO_CRL_MODE5;
GPIOA->CRL |= GPIO_CRL_MODE7;
// Alternate mode on PA5/PA7
GPIOA->CRL = (GPIOA->CRL & ~(GPIO_CRL_CNF5)) | (GPIO_CRL_CNF5_1);
GPIOA->CRL = (GPIOA->CRL & ~(GPIO_CRL_CNF7)) | (GPIO_CRL_CNF7_1);
}
Ported code (stm32wb):
void st7789_GPIOInit(void) {
//setup the clocks
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
//configure PA1 and PA7 as alternate function
GPIOA->MODER &= ~(GPIO_MODER_MODE1 | GPIO_MODER_MODE7);
GPIOA->MODER |= (GPIO_MODER_MODE1_1 | GPIO_MODER_MODE7_1);
//configure PA1 and PA7 to spi mode
GPIOA->AFR[0] &= ~(GPIO_AFRL_AFSEL1) | (GPIO_AFRL_AFSEL7);
GPIOA->AFR[0] |= (5U << GPIO_AFRL_AFSEL1_Pos) | (5U << GPIO_AFRL_AFSEL7_Pos);
//configure data/command pin as output
ST7789_DC_PORT->MODER &= ~(GPIO_MODER_MODE8);
ST7789_DC_PORT->MODER |= GPIO_MODER_MODE8_0;
//configure reset pin as output
ST7789_RST_PORT->MODER &= ~(GPIO_MODER_MODE9);
ST7789_RST_PORT->MODER |= GPIO_MODER_MODE9_0;
//configure spi
SPI1->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE;
//SPI1->CR1 |= SPI_CR1_CPOL;
SPI1->CR1 |= SPI_CR1_SPE;
}
Other cool code stuff:
void st7789_StartCommand(void) {
st7789_WaitNanosecs(10); // D/CX setup time
ST7789_DC_PORT->ODR &= ~ST7789_DC_PIN;
}
void st7789_StartData(void) {
st7789_WaitNanosecs(10); // D/CX setup time
ST7789_DC_PORT->ODR |= ST7789_DC_PIN;
}
void st7789_WriteSpi(uint8_t data) {
for (int32_t i = 0; i<10000; i++) {
if (ST7789_SPI->SR & SPI_SR_TXE) break;
}
ST7789_SPI->DR = data;
while (ST7789_SPI->SR & SPI_SR_BSY);
}
Both MCUs are clocked at 64 MHz and I have tried different SPI baud rates with no success. Both projects do not use DMA for more simplicity while debugging.
Please tell me if there is any more information I need to provide.
Thank you.
Solved! Go to Solution.
2020-07-23 06:37 PM
The problem was it was sending 16 clock cycles instead of 8:
The ST7789_SPI->DR = data
should have been changed to:
*(__IO uint8_t *)&SPI1->DR = data
https://community.st.com/s/question/0D50X00009Xkfrt/spi-8bit-data-length
2020-07-23 06:37 PM
The problem was it was sending 16 clock cycles instead of 8:
The ST7789_SPI->DR = data
should have been changed to:
*(__IO uint8_t *)&SPI1->DR = data
https://community.st.com/s/question/0D50X00009Xkfrt/spi-8bit-data-length