Hi @Rvan .8 ,
If the thermal barrier is sufficient to prevent the frequency drift, then the tcxo is not mandatory for LoRa applications.
It's not simple to say whether a thermal barrier is sufficient or not because it depends on PCB materials etc.
What can be done is to use a "hybrid" footprint. This means a compatible footprint with a crystal and a TCXO. If with a crystal you pass the constraints in terms of frequency drift, then you populate the rest of your PCBs with only the crystal as the source of the HSE oscillator. See an example below:
You should pay attention to the fact that your application might work in a wide range of ambient temperature. In this case, your application with a crystal instead of TCXO should keep the frequency drift below the specifications.
The LoRa specifications are:
LowDataRateOptimize set to 0x00: +- 40.69 hertz (between t_start =0s and t_stop = 700 milliseconds)
LowDataRateOptimize set to 0x01 (SF11 and SF12 only): +- 162.76 hertz (between t_start =0s and t_stop = 2000 milliseconds)
You must keep the frequency drift in the range above during the time t_start and t_stop.
To do this measurement you need a spectrum analyzer with an Analog Demod (FM) option to track the drift of RF carrier at t_start and t_stop depending on the configuration above.
To see an example of thermal barrier that passes the LoRa constraints in terms of frequency drift, go to:
On the link above search for: "HW design models".
And then: "STM32WL RefBoards release www.st.com" (Version 1, 27 Jan 2021)
The file contains the Altium project of the STM32WL (QFN-48 package) Reference Design with a thermal barrier that passes the LoRa constraints in terms of frequency drift.
