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Jitter susceptibility of STM32WL TCXO when using digitally compensated TCXO

TWard.1
Associate II

In testing my LoRa design at 868 MHz on the STM32WL with a digitally compensated TCXO I witness a significant jump in frequency when (what I assume is) a micro-jump of the TCXO occurs. The specification rate this as maximum 300ppb which equates to worst case 260Hz.

What we see is receive bit errors and CRC failures every time this jump occurs during transmission, something that does not occur when using traditional analog compensated TCXO.

Presumably this has something to do with the CSS (de)modulation. What I was wondering is firstly if this is known issue, and secondly if there was some setting that may allow me to limit or filter the transmit/receive signal and improve or eliminate this effect.

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