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STM32H735G-DK's DMA2D Start Address Drifts

GChen.5
Associate II

I'm using CubeMX to generate the start file rather than the BSP example. When I tried to set the DMA2D, I found that the start address will be shifted by 0xC.

...
// setup octospi2 for hyperram, dma2d and ltdc above
uint32_t col;
uint32_t startAdd = 0x70000000; // try to write the hyperram at this address
// use dma2d to write 0xFF224433 to the startAdd
HAL_DMA2D_Start(&hdma2d, 0xFF224433, (uint32_t)startAdd, 6, 1);
 
// try to verify the data in hyperram
for (int i = 0; i < 272; i++) {
    for (int j = 0; j < 480; j++) {
        uint32_t add = (startAdd + (i * 480 + j) * 4);
        col = *(uint32_t *)add;
        if (col == 0xFF224433)
        DEBUG_PRINT_USB("find color at <%d, %d> 0x%x\n", j, i, add);
    }
}
 
// the output is:
find color at <3, 0> 0x7000000C
find color at <4, 0> 0x70000010
find color at <5, 0> 0x70000014
find color at <6, 0> 0x70000018
find color at <7, 0> 0x7000001C
find color at <8, 0> 0x70000020
 
// the start address is shifted by 0xC, whatever start address x I give to the DMA2D, I always read the first value at (x+0xC), what's the problem?

1 ACCEPTED SOLUTION

Accepted Solutions
GChen.5
Associate II

I solved the problem, when I set the S70KL1281, the latency should be set to 3 instead of 6.

S70KL1281_WriteCfgReg0(&hospi2, reg, HAL_OSPI_FIXED_LATENCY, OPTIMAL_FIXED_INITIAL_LATENCY); // the OPTIMAL_FIXED_INITIAL_LATENCY=3

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2 REPLIES 2
GChen.5
Associate II

I solved the problem, when I set the S70KL1281, the latency should be set to 3 instead of 6.

S70KL1281_WriteCfgReg0(&hospi2, reg, HAL_OSPI_FIXED_LATENCY, OPTIMAL_FIXED_INITIAL_LATENCY); // the OPTIMAL_FIXED_INITIAL_LATENCY=3

MM..1
Chief II

Your FOR check code is quicker as DMA ... try add

HAL_DMA2D_PollForTransfer(&hDma2dHandler, 10);