2016-01-07 05:39 AM
Hi,
I'm using a STM32F429 connected to a TVP5150 through DCMI interface.DMA is used to transfer data from DCMI to the external DRAM through the FMC.DMA is configured as follow:hdma_dcmi.Instance = DMA2_Stream1; hdma_dcmi.Init.Channel = DMA_CHANNEL_1; hdma_dcmi.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_dcmi.Init.PeriphInc = DMA_PINC_DISABLE; hdma_dcmi.Init.MemInc = DMA_MINC_ENABLE; hdma_dcmi.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; hdma_dcmi.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; hdma_dcmi.Init.Mode = DMA_CIRCULAR; hdma_dcmi.Init.Priority = DMA_PRIORITY_VERY_HIGH; hdma_dcmi.Init.FIFOMode = DMA_FIFOMODE_DISABLE; hdma_dcmi.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; hdma_dcmi.Init.MemBurst = DMA_MBURST_SINGLE; hdma_dcmi.Init.PeriphBurst = DMA_PBURST_SINGLE; __HAL_LINKDMA(hdcmi,DMA_Handle,hdma_dcmi);while DCMI: hdcmi.Instance = DCMI; //hdcmi.Init.SynchroMode = DCMI_SYNCHRO_EMBEDDED; hdcmi.Init.SynchroMode = DCMI_SYNCHRO_HARDWARE; hdcmi.Init.PCKPolarity = DCMI_PCKPOLARITY_FALLING; hdcmi.Init.VSPolarity = DCMI_VSPOLARITY_HIGH; hdcmi.Init.HSPolarity = DCMI_HSPOLARITY_HIGH; hdcmi.Init.CaptureRate = DCMI_CR_ALL_FRAME; hdcmi.Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B; HAL_DCMI_Init(&hdcmi); HAL_DCMI_ConfigCROP(&hdcmi,160,20,(CAMERA_RESOLUTION_X*2),CAMERA_RESOLUTION_Y); HAL_DCMI_EnableCROP(&hdcmi);When I start the DCMIHAL_DCMI_Start_DMA(&hdcmi, DCMI_MODE_CONTINUOUS, LCD_CAMERA_FRAME_BUFFER, (((CAMERA_RESOLUTION_X)*(CAMERA_RESOLUTION_Y))/2));
a DMA error occurs (error code 2: FIFO ERROR).S1FCR register is 0xA0: FIFO error interrupt enable + FIFO emptyI cannot understand why.Can somebody help me?Thank you.
#stm32f4-dcmi-dma-tvp51502016-01-07 06:14 AM
hdma_dcmi.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
Do you need it enabled to handle disparities in the interfaces.2016-01-07 07:34 AM
I've tried but nothing changed.
May be I used a wrong FIFO configuration!Which can be a right one?However, in DMCI examples provided by ST FIFOMODE is disabled (STM32Cube_FW_F4_V1.10.0\Projects\STM324x9I_EVAL\Examples\DCMI\DCMI_CaptureMode)2016-01-07 08:21 AM
Luca,
I got the best results with FIFO enabled (not using FIFO is a not an option above a few MHz pixel clock), and threshold at 1 quarter full, other parameters being the same as yours. Try to extract from HAL the exact reason for the error (likely to be DMA FIFO error caused by DCMI wanting to feed data into a DMA channel that has its full). Good luck2016-01-08 03:34 AM
Hi,
I tried change FIFO threshold but nothing changed.During test I saw something strange:When i set the DMA buffer length through the lib function HAL_DMA_Start_IT in the S1NDTR register correct value is write (S1NDTR contains number of data to be read) . But after the first DMA interrupt S1NDTR register contains an other value.Moreover, on each following DMA interrupt I see different value stored in this register!As result, on display I see a sort of puzzle.How is that possible?2016-01-10 01:33 AM
Nothing changed, or still does not work, is not enough fo an external observer to help you. Give more details.
BTW, the documentation of SxNDTR is clear: ''This register can be written only when the stream is disabled. When the stream is enabled, this register is read-only, indicating the remaining data items to be transmitted. This register decrements after each DMA transfer.'' No wonder that you can read back to correct value before the transfer and read different values during interrupt routine. I am sure that values are not every time the same, but close enough to the transfer size (the difference characterize the interrupt latency). The puzzle on the display can be the result of several misconfiguration at DCMI level or LTDC, or somewhere else. Try to capture DCMI data into a file, and analyse it on your host development machine.2016-02-06 03:10 PM
Hi Luca
Have you made any progress with your attempt?