REPOST: Interrupt settings & priority for RTOS and Touch GFX on STM32

[Anders Nedergaard PETERSEN]

QUESTION - TouchGFX Community repost - Honza Krejsa - Apr 2016

Hello all, 

I just have come into the situation where I have to figure out again how interrupts are manage in RTOS on cortex cores and how TouchGFX has set up priority and etc. It would be great to have some simple guide for different platforms that summarizes priorities, available values max/min priority for interrupts which can safely communicates with threads and how TouchGFX is preset. Is anything like that available?

Thank you very much, Jan 

ANSWER - TouchGFX Community repost - Soren Pingel Dalsgaard - April 2016

Hi Jan,

This is a complex topic.

We do not have a guide for this I'm afraid. Anyway for background information on Cortex-M priority and their relation to FreeRTOS, check this out: http://www.freertos.org/RTOS-Cortex-M3-M4.html

Matters are complicated slightly because the amount of priority bits differ across platforms. STM32 is 4 bits if I recall correctly. In addition it is configurable during runtime how many of these bits are actually preemptive. Only preemptive bits truly matter - the subpriority bits are not really useful here, as they only control which one to pick first if multiple ints are pending when global int is (re)enabled. I believe newer Cube versions configure all as preemptive, which has not always been the case.

On a FreeRTOS+TouchGFX system, there are two key things to uphold:

1. FreeRTOS requires that any interrupt which calls a FreeRTOS function (like posting to a semaphore) is done in a lower priority than the interrupts which control the FreeRTOS kernel itself.
2. TouchGFX requires that the DMA and LTDC interrupts are of the same priority. Both these ints call FreeRTOS functions, so their prio level must adhere to 1).

As for 1, these values are controlled by the FreeRTOSConfig.h (in TouchGFX apps it is placed under <app>/platform/os/). Here you inform FreeRTOS how many bits you actually have (that are preemptive). Note that this value can be controlled by a #define set by your toolchain or some other header file. 

You can also change which prio the FreeRTOS kernel interrupts should use, in order to give you more flexibility in choosing how many interrupt prios you want that are "FreeRTOS safe" (below kernel) and how many you want that are "real-time safe" (above kernel).

TouchGFX does not really care about the exact values in the above, as long as 2) is uphold. The interrupt values of the DMA and LTDC ints are set in STM32F4HAL.cpp. If you change FreeRTOSConfig.h values you maybe need to change these values too. The prio settings that are standard in TouchGFX applications are not necessarily the optimal ones. The same TouchGFX app must run on a multitude of Cortex-M targets with different prio bits, so the values were simply chosen so that they work most of the time. 

I would advise you to perform a runtime read of the actual priorities after everything is setup to verify which priority level was actually set. You should find that the DMA and LTDC are lower prio than the FreeRTOS stuff (PendSV/SVC), but apart from that I do not know what values you will see. But it should give you an idea of how many safe prio levels you have available in your concrete project+platform.

Also note that TouchGFX performance relies on efficient interrupt processing. If you add higher prio interrupts, they should be relatively fast in execution time (< 10 microseconds perhaps) and/or occur with a low freq.