I have custom board with 800x480 TFT display, external SDRAM and STM32H745II MCU.
I have two problems that can be related, but I'm not sure
- When I'm trying to change one byte in the SDRAM from the debugger Memory window, 8 bytes around it change, mostly to zero, sometimes to some random values. It works in IAR IDE and in VisualGDB (OpenODC + GDB). If I try to change one byte from the firmware, everything works good.
- I'm porting lvgl to my board. Video memory is located in the external SDRAM. I try to use DMA2D to write internal lvgl buffer to the video memory (implementing flush_cb lvgl function). Sometimes, depending on the widget coordinates and size, calculated DMA2D addresses and offsets become not aligned by 8 bytes. In this case after the transfer I see from 1 to 3 zero pixels on the image, at the end of the each copied image line. In the memory there are 2 to 6 zero bytes, from the end of the image line to the next 8-byte alligned address.
Is it some SDRAM\FMC specific, or DMA2D aligment requirement? Or can it be misconfiguration in FMC, LTDC or DMA2D? Memory cache problem?
Picture 1: 5 lvgl progress bars, drawn with 1 pixel step in the x coordinate. You can see black 1-3 pixel width black borders.
Picture 2: Memory state after I tried to change 1 byte at 0xd00001f0. All 8 bytes are reseted to some values.
