Posted on December 28, 2017 at 15:38ST7735R in a common SPI configuration has an SD card attached to the board. Resolution of the display is 128 x 160. The controller has an SPI MOSI, but the pin is shared with MISO on the controller chip. You'd need half duplex there. For Deep: the reason you can only pick two configurations is that the other pins are already in use, so as mentioned, either pick another SPI interface completely or remap the pins so that none are used. If you're using an EPSON S1D13781, it will not share the interface (MISO is set low when chip is not selected, not tristated). You must add a 74LS125 section to enforce tristate, run the 125 enable from CS on the display chip.
I've tried using half duplex masters, but I never got clocks from the CPU. You might want to think of adding an LS125/LS126 pair, controlling them with a separate RW line, and thus rerouting the MISO signal from the display back to the master MISO. That might work.
If you can't read the display, then you must buffer the entire display memory in the CPU for read/modify/write operations.
So yes, definitely situations where you don't have full access to the LCD for reading. (a peculiarity of this chip, perhaps others, in what they call 3 wire serial or 4 wire serial. 4 wire serial is NOT MISO/MOSI).
