If RTOS is used on an M7 core, does it have to run on the other M4 core as well?

[Clem1]

I am running a simple task on the M4 core which I want to clearly separate from the M7 core, which runs the GUI (TouchGFX generated). Since I am only running a single task on the M4 I would not need an RTOS for reasons of functionality. However, I have seen some strange behavior that made me wonder whether there was some dependency between these two cores (Each should be completely independent of the other, except for shared resources, right?). My plan is to communicate data between these cores by using semaphores and the shared memory area as specified in the datasheet. Can this work or does the M4 HAVE to run an RTOS as well, using a single (default) task?

[FBL]

Hello @Clem​,

Check this example to use FreeRTOS's message buffers to pass data from one core to another: STM32Cube\Repository\STM32Cube_FW_H7_V1.11.0\Projects\NUCLEO-H745ZI-Q\Applications\FreeRTOS\FreeRTOS_AMP_Dual_RTOS

Also, I found this article interesting.

Simple Multicore Core to Core Communication Using FreeRTOS Message Buffers - FreeRTOS

[Tesla DeLorean]

The CM4 can run whatever code you want, without an RTOS

You need to suitably partition the memory so you're not modifying areas you want to use yourself.

And you need to determine how you want to pass information, or communicate, and on the CM7 side be aware of cache coherency, and signalling.

[Clem1]

That is good to know, thank you for the confirmation. I have earlier run example code on a DISCO board where both cores of the STM32H747 were running without RTOS and the M4->M7 unidirectional data exchange from M4 to M7 did work by defining a pointer to data (in both cores) such as

#define SHD_RAM_START_ADDR  0x38000000

volatile struct shared_data * const shared_ptr = (struct shared_data *)SHD_RAM_START_ADDR;

and causing a "data ready" interrupt on the M7 by letting M4 release the semaphore.

HAL_HSEM_Take(HSEM_ID_0, 1);

shared_ptr->angle = angle;

HAL_HSEM_Release(HSEM_ID_0, 1);

This works so far when none of the cores are running RTOS, but according to your answer, I am inclined to believe that this mechanism works with a mixed case (M4 non-OS, RTOS on M7).

@F.Belaid​ : thank you for your answer but I am trying to keep the system as simple as possible and aim to avoid unnecessary complications such as using RTOS if not absolutely necessary.

So these message buffers would only work if both cores would run RTOS...

[SofLit · Accepted solution]

Hello,

 Not necessary. You can share buffers without RTOS.

You can refer to the AN5617 " STM32H745/755 and STM32H747/757 lines inter-processor communications" for synchronization and data sharing between the two cores.

[Clem1]

Thank you. I'll have a look at that.