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STM32H750VBT6 access crypt registers all read back zero

Roger, Huang
Associate II

Hi,

Developing AES GCM on a customer board that is used STM32H750VBT6 with CubeMX 6.1.1 has a problem needs help.

Tested example code CRYP_AES_GCM from STM32Cube_FW_H7_V1.8.0 Projects/STM32H735G-DK/Examples/CRYP is failed. And used JLINK debug figure out all registers of crypt are all zero. and test code run to DES cipher.

Has any suggestion?

Thanks

18 REPLIES 18

@Pavel A.​  thanks for posting that

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@Pavel A.​ Thx for this test. I retraced your steps in Mecrisp Stellaris (a Forth system) and it confirms that the HASH (and CRYP) peripherals ignore writes and read as all zeros on my STM32H750VB chip. I was going crazy because I couldn't find the bug in my code.

I have the same problem with my chip (revision V as well) with a date code of 039 (week 39 or 2020?).0693W00000D1mDWQAZ.jpg

More testing on V Step (ranges based on forum reporting)

2020 Week 18 working

2020 Week 36 thru 44 missing HASH/CRYP

2020 Week 49 thru 51 working

I have Y Step from 2019 08 and 2019 36, not bothering to test those

V Step part markings of boards I have whilst doing quick inventory

7B738 VQ

PHL 7B 018

7B377 VQ

PHL 7B 044

7B736 VQ

PHL 7B 049

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Does seem to be an issue for parts spanning several months. Could we perhaps get an official position on the scope of the problem, and paths to remedy this? At a minimum the Weeks in 2020 when H750 parts shipped without HASH/CRYP enabled.

@Imen DAHMEN​ 

@Amel NASRI​ 

@STOne-32​ 

@Peter BENSCH​ 

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And what about users who already have those broken chips soldered on their (dev) boards?

Out-of-luck probably unless those parts were purchased directly from ST

VQ is "ST Crolles CR300 (France)"

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Official word is that 2020 Week 22 thru 47 are impacted.

https://community.st.com/s/question/0D53W000010RpinSAC/how-to-enable-the-stm32h750vbt6-hw-crypto

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