Solved: Re: STM32G0 Readout Protection questions - STMicroelectronics Community

1. If in RDP Level 1, can the SRAM be read?

2. If starting in RDP Level 1 and transitioning to RDP Level 0, is the SRAM erased?

3. Can the contents of SRAM be readout after the transition from RDP Level 1 to RDP Level 0?

Thanks.

1 ACCEPTED SOLUTION

Accepted Solutions

1) No, RDP level 1 prevents SRAM from being read. From the reference manual:

2) Yes.

3) Yes, but they've been erased.

(Assuming you mean "read" as "read by the debugger" as the program itself can use SRAM just fine regardless of RDP level.)

Relevant reading material:

https://www.st.com/resource/en/application_note/an5156-introduction-to-stm32-microcontrollers-security-stmicroelectronics.pdfhttps://kolegite.com/EE_library/application_notes/STM32/STM32_Security.pdf

If you feel a post has answered your question, please click "Accept as Solution".

View solution in original post

2 REPLIES 2

1) No, RDP level 1 prevents SRAM from being read. From the reference manual:

2) Yes.

3) Yes, but they've been erased.

(Assuming you mean "read" as "read by the debugger" as the program itself can use SRAM just fine regardless of RDP level.)

Relevant reading material:

https://www.st.com/resource/en/application_note/an5156-introduction-to-stm32-microcontrollers-security-stmicroelectronics.pdfhttps://kolegite.com/EE_library/application_notes/STM32/STM32_Security.pdf

If you feel a post has answered your question, please click "Accept as Solution".

Thanks for the quick reply