I have modified the example you referenced for my specifics, but am not seeing the MPCWM registers change when I step through HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes() with the IAR C-Spy debugger. I am building with STM32Cube_FW_V1.5.0. See code below.
#include <stm32u5xx_hal_gtzc.h>
/***************** Adapted from STM example code ***************************/
/**
* @brief Configure SAU and MPCWM1 in initial conditions
* @note SAU and MPCWM1 are setup to allow non-secure access
* from 0x6000'0000 to 0xAFFF'FFFF.
* @retval None
*/
void SECURE_SAU_MPCWM_SetInitConfig(void)
{
MPCWM_ConfigTypeDef MPCWM_Desc;
/* protect this SAU/MPCWM1 setup section from any fault interrupt occurrence */
// __disable_fault_irq();
/* Set first half of memory as non-secure, second half as secure */
/* SAU update based on partition_stm32u5xx.h used at setup */
/* Set all of SAU region 4 : (0x60000000-0xAFFFFFFF) as non-secure */
SAU->RNR = (4 & SAU_RNR_REGION_Msk);
SAU->RBAR = (FMC_BASE & SAU_RBAR_BADDR_Msk);
SAU->RLAR = ( ((FMC_BASE + 0x4FFFFFFFUL) & SAU_RLAR_LADDR_Msk)
| ((0 << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)
| 1U); // enable region
/* MPCWM2: set one non-secure area on first half */
/* The second half is set as secure by default */
MPCWM_Desc.AreaId = GTZC_TZSC_MPCWM_ID1; // OSPI1 starting at 0x9000'0000
MPCWM_Desc.Offset = 0 * GTZC_TZSC_MPCWM_GRANULARITY_1; // 128 KB granularity
MPCWM_Desc.Length = 64 * 4 * GTZC_TZSC_MPCWM_GRANULARITY_1; // 64 MB
MPCWM_Desc.AreaStatus = ENABLE;
MPCWM_Desc.Attribute = GTZC_TZSC_MPCWM_REGION_NSEC;
MPCWM_Desc.Lock = GTZC_TZSC_MPCWM_LOCK_OFF;
if (HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes(FMC_BASE, &MPCWM_Desc) != HAL_OK)
{
/* Initialization error */
while(1);
}
/* re-enable fault interrupt occurrences after this SAU/MPCWM2 setup section */
// __enable_fault_irq();
}
/***************** Adapted from STM example code ***************************/
int main(void)
{
/* Initialise all required board hardware. */
hal_init();
SECURE_SAU_MPCWM_SetInitConfig();
