2016-06-15 10:16 AM
I just discovered the hard way that if you initiate a full flash erase cycle (in my case, by going from RDP level 1 to level 0) and reset the chip before that process is complete then the chip is essentially (AFAICT) bricked. DFU mode will no longer allow you to download new code. When I try (using dfu-util) it says ''ERASE_PAGE not correctly executed''.
So my question is: how can you know when a full flash erase is done? You can't provide feedback from software (again, AFAICT) because both the flash and the user RAM get erased, so there's no more code to execute. And I can't find any documentation that says how long a full flash erase takes. So how can you know how long to wait before resetting without bricking the chip? #rdp-full-flash-erase2016-06-15 10:35 AM
The data sheet specs (F429/439 2MB) the mass/bank erase at between 8-32 seconds, and factors like voltage and array life-cycle tend to play a large part in how long it is going to take.
Not sure it erases the RAM