2022-11-09 05:55 AM
I use my own application to program different devices, arm in particular. Now, i'd like to support stm32L552. So, if TZEN = 0 it works fine.
if TZEN = 1, DBANK = 1, SECWM1_PSTRT - set as secure, SECWM2_PSTRT - set as non-secure, RDP = 0xaa (level 0) i cant read flash using SWD. STM32CubeProgrammer works perfectly in both cases.
I'd appreciate any help
2022-11-11 03:09 AM
Hello @angry.sioux and welcome to the Community :)
Check if the SWD is mapped on the right pin.
I advise you to refer to this article: Security:How to disable TrustZone in STM32L5xx devices during development phase
Imen
2022-11-11 03:30 AM
Hi Imen,
>>Check if the SWD is mapped on the right pin.
I cannot read only the FLASH in case of TZEN = 1. But I read registers (CTRL_STAT, IDR...), can read OPTR, FLASHSIZE_BASE and so on. So, it;s not about a SWD pin.
>>I advise you to refer ....
I have read Security:How to disable TrustZone in STM32L5xx devices during development phase and did not find an answer. Otherwise I would never reach out to for a favor.
Thank you
2022-11-14 12:38 AM
I found a way that made things a bit better.
There is WAIT response if i access to AP register. But.
If i read a register twice the error goes away.
f.e. schematically
//do not need to read, just write
write_register ( SELECT_REG, bank select for CSW_REG)
write_register ( SELECT_REG, bank select for TAR_REG) - error, WAIT
but
write_register ( SELECT_REG, bank select for CSW_REG)
read_reg(CSW_REG) - dummy read, enough for "no error", but returns trash.
read_reg(CSW_REG) - returns appropriate value
write_register ( SELECT_REG, bank select for TAR_REG) - no error, great
but
if i halt and reset core i got DHCSR_S_LOCKUP
2022-11-15 06:49 AM
Thanks for the quick reply and detailed answers to all inquiries. Thank you so much.
To simplify the process i'll split the problem into small pieces.
To write a some array i need to specify address (TAR) and tell CSW that i want to CSW_SIZE_32BITS, CSW_ADDRINC. After that i can write DRW in the loop as much as I need to. That is always how it has worked.
Now (in stm32L552 ) i see that i need to add dummy read after each iteration. Otherwise, i'm getting WAIT response.
The one question. Why?
2022-11-16 01:38 AM
You have been very helpful. Thank you. Thanks to your help i found out a workaround by adding idle request after writing. Though I still don't understand the difference with previous devices.
But now i faced with next problem. I halt the core and change PC (some code in this address). After start the core i get LOCKUP. (PC not 0xfffffffe) I do what used to do with numerous previous devices. I hope you'll help me in this case as you did it before. I have read you comments with great interest and pleasure. It's a pity that SWD pins on the right place.
Thank you so much.