Why SDIO Clock Signal is generating higher radiated emissions?

[RDave.2]

Hello,

We are using STM32F765BI series MCU. We are using SD Card using the SDIO interface. It seems that when the SDIO module is Active (CLK signal is generated at 24MHz), higher emissions are observed in the spectrum. When we disable the SDIO module (Clock stops generating 24 MHZ) then emissions are drastically reduced.

1. The Trace impedance is 50 Ohm for Clock, command and Data.
2. Have placed RC filter near to the Clock pin of MCU.
3. Clock source for SDMMC1 block is from USB48_PLL.

Let us know how we can eliminate the higher emissions.

Regards

Rachit Dave

[AScha.3]

>set all pins to SDcard to lowest possible speed. (medium or low) .

+ what speed setting you use ?

[RDave.2]

we have to use SD clock at 24MHz

[AScha.3]

nono....the pin speed setting !

here-> medium

[gregstm]

You could try surface mount ferrite bead + 1nF(?) capacitor (eg. 603 size) as the clock filter - but the higher noise could be just a symptom of other things that might need improving (eg. decoupling, ground plane design,...)