Why CAN_IT_FMP0 and CAN_IT_FMP1 interrupts are DISBALED in the CAN_Receive_IT () function of the HAL library?

[xshen]

hi，dear all

i want to know why ​ the CAN_IT_FMP0 and CAN_IT_FMP1 interrupts are DISBALED in the CAN_Receive_IT () function of the HAL library?

Thanks and regards

[TDK]

They aren't disabled in the code I'm looking at. Perhaps post the chip you're using and code you're talking about so we don't have to guess.

[xshen]

the function is as follows：

static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)

{

 uint32_t tmp1 = 0U;

 CanRxMsgTypeDef* pRxMsg = NULL;

 /* Set RxMsg pointer */

 if(FIFONumber == CAN_FIFO0)

 {

  pRxMsg = hcan->pRxMsg;

 }

 else /* FIFONumber == CAN_FIFO1 */

 {

  pRxMsg = hcan->pRx1Msg;

 }

 /* Get the Id */

 pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;

 if (pRxMsg->IDE == CAN_ID_STD)

 {

  pRxMsg->StdId = 0x000007FFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21U);

 }

 else

 {

  pRxMsg->ExtId = 0x1FFFFFFFU & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3U);

 }

 pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;

 /* Get the DLC */

 pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;

 /* Get the FIFONumber */

 pRxMsg->FIFONumber = FIFONumber;

 /* Get the FMI */

 pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8U);

 /* Get the data field */

 pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;

 pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8U);

 pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16U);

 pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24U);

 pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;

 pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8U);

 pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16U);

 pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24U);

 /* Release the FIFO */

 /* Release FIFO0 */

 if (FIFONumber == CAN_FIFO0)

 {

  __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);

  /* Disable FIFO 0 overrun and message pending Interrupt */

  __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FOV0 | CAN_IT_FMP0);

 }

 /* Release FIFO1 */

 else /* FIFONumber == CAN_FIFO1 */

 {

  __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);

  /* Disable FIFO 1 overrun and message pending Interrupt */

  __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FOV1 | CAN_IT_FMP1);

 }

 tmp1 = hcan->State;

 if((tmp1 == HAL_CAN_STATE_BUSY_RX0) || (tmp1 == HAL_CAN_STATE_BUSY_RX1))

 {  

  /* Disable Error warning, Error passive, Bus-off, Last error code

    and Error Interrupts */

  __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |

                CAN_IT_EPV |

                CAN_IT_BOF |

                CAN_IT_LEC |

                CAN_IT_ERR);

 }

 /* Change CAN state */

 if (FIFONumber == CAN_FIFO0)

 {

  switch(hcan->State)

  {

   case(HAL_CAN_STATE_BUSY_TX_RX0):

    hcan->State = HAL_CAN_STATE_BUSY_TX;

    break;

   case(HAL_CAN_STATE_BUSY_RX0_RX1):

    hcan->State = HAL_CAN_STATE_BUSY_RX1;

    break;

   case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):

    hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;

    break;

   default: /* HAL_CAN_STATE_BUSY_RX0 */

    hcan->State = HAL_CAN_STATE_READY;

    break;

  }

 }

 else /* FIFONumber == CAN_FIFO1 */

 {

  switch(hcan->State)

  {

   case(HAL_CAN_STATE_BUSY_TX_RX1):

    hcan->State = HAL_CAN_STATE_BUSY_TX;

    break;

   case(HAL_CAN_STATE_BUSY_RX0_RX1):

    hcan->State = HAL_CAN_STATE_BUSY_RX0;

    break;

   case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):

    hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;

    break;

   default: /* HAL_CAN_STATE_BUSY_RX1 */

    hcan->State = HAL_CAN_STATE_READY;

    break;

  }

 }

 /* Receive complete callback */ 

 HAL_CAN_RxCpltCallback(hcan);

 /* Return function status */

 return HAL_OK;

}​

[TDK]

They appear to be disabled after the end of reception occurs.

  /* Check End of reception flag for FIFO0 */
  if((tmp1 != 0U) && tmp2)
  {
    /* Call receive function */
    CAN_Receive_IT(hcan, CAN_FIFO0);
  }