Where to download STM3210E-EVAL FW ?

[neoirto]

Posted on September 27, 2013 at 01:48

Hi all,

I can't find the

STM3210E-EVAL_FW_V2.0.0 

anymore ?? I looked deeply on the st.com domain, but I can only find the last 2.1.0 is available online.Where can I find the archive please ?Thanks in advance

[Tesla DeLorean]

Posted on September 30, 2013 at 15:44

I used 2.1.0 rather than fight my way through the older version. The code is usable for SD and SDHC cards.

The wiring for the Micro SD card socket is pretty simple, and consistent across STM32 platforms. Stick with a known working design

[neoirto]

Posted on September 30, 2013 at 18:38

This is the known working schematics of the Eval board ?

I found a lot of sources with a 10K on CMD, and did my first board with that setting. I will reflow a new one with 47K everywhere, because I have some issues with the first. But I can't see very well if it can come from there...I tested the SDIO code with both HSE, and HSI clock, with the same results. But I found a strange oscillation of the HIGH and LOW levels on the CLK line when HSE was used. Something probably related with a bad crystal conf...Now, just after a new HSE enable, successfully programmed, I just can't communicate anymore with my board (everything where fine with ST-Link V2 until there).The connection is impossible, or it crashes during the erase step... Perhaps due to the crystal ??Don't know if i can fix that by any way ???Tx again

[Tesla DeLorean]

Posted on September 30, 2013 at 19:15

It shouldn't need the HSE to be programmable, setting BOOT0 = High side steps any issues with user code.

Now you mentioned HSE earlier, I'm running the PLL at 72 MHz, the SDIO is clocking from this, basically the card clock is DIV3 (24 MHz), based on the settings in the include file. On the F2/F4 boards the PLL has to be running for SDIO to work. I don't know of the exact rules for the F1, but there were certainly some rules with respect to AHB/APB clocks and SDIO. The schematic is from the STM3210E-EVAL, I have one of these to hand, and have tested with that. You might want to step back and test on a similar platform. I'm not clear if you have an STM3210E-EVAL board, or just your custom build. Does SD_Init() succeed?

[neoirto]

Posted on September 30, 2013 at 19:43

I will test Boot0 HIGH so, Tx for your advise !

So I can pull high, then use the JTAG programing process pulling high all the time of the programming ?? If not, you mean by USART1 programing (never done that) ?You're true, I have no STM3210E-EVAL, only my custom board. The STM3210E-EVAL is a bit expensive, and I was confident (perhaps too much...:().About the PLL, I used the exact code of the STM3210E-EVAL, because my crystal is 8MHz too, just thinking it would be the same config...About SD_Init() : it crashes, because of the line :errorstatus = SD_PowerON();...inside of the SD_Init function.Many Tx again Clive

[neoirto]

Posted on October 02, 2013 at 10:57

Hello,

According to Clive's post, I fixed the JTAG problem with the USART1 bootloader (Flash Loader Demonstrator), Tx Clive, it helps.The JTAG on this first board is not working anymore even after that.But I reflowed another board (with 47K pull up everywhere), with good JTAG. Unfortunately, the result is the same for SD_Init().I probably identified the problem : checking the CLK output (400 KHz on init phase) on a little oscillo (no screenshot possible), I see strange regular oscillations of the HIGH and LOW levels, so the logic HIGH and logic LOW levels should be not consistent for the SD. For sure it's the source of the problem... Bad layout I'm afraid of.The oscillation in levels is awefull when using HSE as source for PLL at 72 MHZ, and is still visible, and probably a problem too, when HSI is used as a source for PLL at 64 MHz.So I produced a 400 KHz PWM with TIM5 to see if problem was the same : exactly the same.I will create another thread for that,Tx for your help Clive ;)