What is the precise sequence of QW, BSY and interrupts during flash programming?
After reading the section about Flash in RM0433 I am till a bit in doubt of the sequence of events during flash programming.
This is important because I need to know that certain write operations are complete (such that the update is reflected even if the device is reset or power is lost at that point) before starting other write operations.
According to my understanding, I start by setting the PG flag in the FLASH_CR of the bank that is to be programmed, then I write 32 bytes starting at a 32-byte-aligned address.
After this, the QW flag should go high and when it goes low, I can start another write operation (Question 1: does this mean the physical write has begun or that it is complete?). Question 2: What role does the BSY flag have (is it obsolete or does it mean that physical write is ongoing or ...)?
Question 3: If I enabled interrupts, "End of programming" will be invoked at some time, but when (when QW goes low or when the physical operation is complete or ...)?

