2020-11-07 11:28 PM
Flowing pictures have no hints to "Bufferable" attribute. Also in Cache column, some region have WB attributes which is just about caching capability; but we know that ARMv7-M architecture didn't consider any cache or cache controller inside the processor (outside the processor can be implemented by microcontroller manufacturer), so these attributes can't be considered as default attributes, because some (many) microcontrollers do not have caching capability. In summery there is no any clear description about default attributes. I'm confused!!!
my next question is:
Why, while the ARMv7-M architecture implemented Buffering capability (Bufferable attribute) in the processor, but ST Programing Manual (PM0056) say's that we should program the MPU as the flowing table which dose not consider "Bufferable attribute" for Code and SRAM ? What regions (Code, SRAM, Peripheral and etc.) are bufferable in ARMv7-M architecture? :
I would appreciate it if help me. Thank.