Voltage tolerance on VCC, VDDA, VREF

[GAnde.1]

According to datasheet, VREF must be <=VDDA.

We use an accurate 3.3V reference voltage on VREF.

VDDA is connected to VCC supplied by a LDO 3.3V with +-2% accuracy.

Thus it would be possible that VREF is above VDDA by 66mV. Is that a problem?

[Danish1]

The data sheet for your stm32 is the best place to look for answers.

One place to look is "Absolute maximum ratings" in the "Electrical Characteristics" chapter. If you disobey them, you could permanently damage your stm32.

I don't see which stm32 you are using, but I see for stm32l4a6 (one I recently looked at) they say in Table 19 Voltage characteristics:

VREF+ - VDDA Allowed voltage difference for VREF+ > VDDA Min: none, Max 0.4 V

So you shouldn't damage your stm32 by your proposed running conditions. But you still need to pay attention to turn-on and turn-off stages (e.g. which voltage comes up first). For that part, in the Functional Overview chapter, there is a section on "Power Supply Management" that has a chart of allowable voltages as Vdd ramps up and down.

Hope this helps,

Danish

[GAnde.1]

Thank you for the answer, we use the STM32G473. In table Table 64. ADC characteristics it says VREF max. is VDDA. Actually, the same is stated in the corresponding table in the stm32l4a6 datasheet: Table 76. ADC characteristics.

However, for the stm32l4a6, like you said, absolute maximum rating is given as 0.4V. For the STM32G473 this information is missing unfortunately. I guess 66mV won't harm anyways then.

Good hint with turn-on conditions!...