Using sub MHz external clock source for HSE Bypass - trying to understand existing solution

[TGilc.1]

Folks

This is a bit of a "how do these things work" question. I'm designing a board to replace an existing board in a larger solution. I'm working with the vendor and can get the details from them but I just wanted to take a chance to get to understand clocks a bit better (I'm a newbie).

The existing board (i.e. the one I'm replacing) has a STM32F030C8T6 (TSSOP20). If I'm reading the spec sheets right this chip can take an external / bypass HSE clock source of 4 - 32GHz. There are no pins for the LSE on the package in question.

However, the board is being fed with a 200KHz clock signal which rather confuses me? Can this be done? There's no crystal on the board so it's either using that clock source or the internal clock. The highest frequency requirement it has is 115,200 async UART so the internal clock is probably fine but if that is the case I'm wondering why they've added the external clock source?

I'll not be using that package so I'll have other options. I see I can feed a 200KHz signal into the LSE bypass but, if I'm reading the diagrams right, that has nothing to do with the system clock?

In case it's relevant, the external clock source is asymmetric, 3us high, 2us low

[TDK · Accepted solution]

> However, the board is being fed with a 200KHz clock signal which rather confuses me? Can this be done?

Your understanding is correct. You can't feed a 200kHz signal into the HSE bypass. As for why, you'd have to ask the designer. The datasheet has chip-specific requirements. For HSE bypass, it's 1-32 MHz per the datasheet. There is also a duty cycle requirement. Not sure if 40%/60% satisfies it.

> I'll not be using that package so I'll have other options. I see I can feed a 200KHz signal into the LSE bypass but, if I'm reading the diagrams right, that has nothing to do with the system clock?

Correct, LSE is used for the RTC, not the system clock.

[TGilc.1]

Thanks for that.

Also, so THAT'S what duty cycle means.

Obvious in hindsight :)